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  • Question

  • In a seven-segment LED display, the BCD must be decoded into a format that can be used to drive the decimal numeric display.


  • Options
  • A. True
  • B. False

  • Correct Answer
  • True 

    • Counters problems

    Search Results

    • 1. If data is brought into the J terminal and its complement to the K terminal, a J-K flip-flop operates as a(n) ________.

    • Options
    • A. S-C flip-flop
    • B. D flip-flop
    • C. gated S-C flip-flop
    • D. TOGGLE flip-flop
      • Discuss
    • 2. An astable multivibrator is a circuit that ________.

    • Options
    • A. has two stable states
    • B. is free-running
    • C. produces a continuous output signal
    • D. is free-running and produces a continuous output signal
      • Discuss
    • 3. The J-K flip-flop is a standard building block of clocked (sequential) logic circuits known as a ________.

    • Options
    • A. FUNCTION
    • B. logic primitive
    • C. VARIABLE
    • D. PROCESS
      • Discuss
    • 4. When both inputs of a J-K pulse-triggered FF are high and the clock cycles, the output will ________.

    • Options
    • A. be invalid
    • B. not change
    • C. remain unchanged
    • D. toggle
      • Discuss
    • 5. The duty cycle of a 555 timer configured as a basic astable multivibrator is controlled by ________.

    • Options
    • A. one resistor
    • B. two resistors
    • C. one capacitor
    • D. a resistor and a capacitor
      • Discuss
    • 6. Synchronous binary counters can only be used for the application of timing of digital systems.

    • Options
    • A. True
    • B. False
      • Discuss
    • 7. To cascade is to connect in parallel.

    • Options
    • A. True
    • B. False
      • Discuss
    • 8. Shift register counters use logic functions to reset the registers when the desired count is reached.

    • Options
    • A. True
    • B. False
      • Discuss
    • 9. Once an up/down counter begins its count sequence, it cannot be reversed.

    • Options
    • A. True
    • B. False
      • Discuss
    • 10. An effective time delay device can be constructed by using the propagation delay characteristic of parallel shift registers.

    • Options
    • A. True
    • B. False
      • Discuss

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