When both inputs of a J-K pulse-triggered FF are high and the clock cycles, the

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Question
When both inputs of a J-K pulse-triggered FF are high and the clock cycles, the output will ________.
Options
A. be invalid
B. not change
C. remain unchanged
D. toggle

Correct Answer

toggle

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1. The duty cycle of a 555 timer configured as a basic astable multivibrator is controlled by ________.
Options
A. one resistor
B. two resistors
C. one capacitor
D. a resistor and a capacitor

3. The asynchronous inputs on a J-K flip-flop ________.
Options
A. are normally not at the active level at the same time
B. take precedence over the J and K inputs
C. do not require a clock pulse to affect the output
D. all of the above

7. An astable multivibrator is a circuit that ________.
Options
A. has two stable states
B. is free-running
C. produces a continuous output signal
D. is free-running and produces a continuous output signal

8. If data is brought into the J terminal and its complement to the K terminal, a J-K flip-flop operates as a(n) ________.
Options
A. S-C flip-flop
B. D flip-flop
C. gated S-C flip-flop
D. TOGGLE flip-flop

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