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Home
‣
Digital Electronics
‣
Flip-Flops
Comments
Question
The postponed symbol (
) on the output of a flip-flop identifies it as being ________.
Options
A. a D flip-flop
B. a J-K flip-flop
C. pulse triggered
D. trailing edge-triggered
Correct Answer
pulse triggered
Flip-Flops problems
Search Results
1. A gated S-R flip-flop is in the hold condition whenever ________.
Options
A. the Gate Enable is HIGH
B. the Gate Enable is LOW
C. the
S
and
R
inputs are both LOW
D. the Gate Enable is HIGH and the
S
and
R
inputs are both LOW
Show Answer
Scratch Pad
Discuss
Correct Answer: the Gate Enable is HIGH and the
S
and
R
inputs are both LOW
2. A positive edge-triggered flip-flop will accept inputs only when the clock ________.
Options
A. is LOW
B. changes from HIGH to LOW
C. is HIGH
D. changes from LOW to HIGH
Show Answer
Scratch Pad
Discuss
Correct Answer: changes from LOW to HIGH
3. A gated D latch does not have ________.
Options
A. a clock input
B. an enable input
C. a
output
D. steering gates
Show Answer
Scratch Pad
Discuss
Correct Answer: a clock input
4. The signal used to identify edge-triggered flip-flops is ________.
Options
A. a bubble on the clock input
B. an inverted "L" on the output
C. the letter "E" on the enable input
D. a triangle on the clock input
Show Answer
Scratch Pad
Discuss
Correct Answer: a triangle on the clock input
5. A gated S-R flip-flop goes into the CLEAR condition when ________.
Options
A.
S
is HIGH;
R
is LOW;
EN
is HIGH
B.
S
is LOW;
R
is HIGH;
EN
is HIGH
C.
S
is LOW;
R
is HIGH;
EN
is LOW
D.
S
is HIGH;
R
is LOW;
EN
is LOW
Show Answer
Scratch Pad
Discuss
Correct Answer:
S
is LOW;
R
is HIGH;
EN
is HIGH
6. When the output of the NOR gate S-R flip-flop is in the HOLD state (no change), the inputs are ________.
Options
A.
S
= 1,
R
= 1
B.
S
= 1,
R
= 0
C.
S
= 0,
R
= 1
D.
S
= 0,
R
= 0
Show Answer
Scratch Pad
Discuss
Correct Answer:
S
= 0,
R
= 0
7. The advantage of a J-K flip-flop over an S-R FF is that ________.
Options
A. it has fewer gates
B. it has only one output
C. it has no invalid states
D. it does not require a clock input
Show Answer
Scratch Pad
Discuss
Correct Answer: it has no invalid states
8. A major drawback to an
latch is its ________.
Options
A. complexity
B. slow speed
C. invalid condition
D. latch mode
Show Answer
Scratch Pad
Discuss
Correct Answer: invalid condition
9. The action of ________ a FF or latch is also called resetting.
Options
A. breaking
B. clearing
C. freeing
D. changing
Show Answer
Scratch Pad
Discuss
Correct Answer: clearing
10. The ________ is the time interval immediately following the active transition of the clock signal.
Options
A. hold time
B. setup time
C. over-time
D. hang-time
Show Answer
Scratch Pad
Discuss
Correct Answer: hold time
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