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Home Digital Electronics Flip-Flops Comments

  • Question
  • In VHDL, each instance of a component is given a name followed by a ________ and the name of the library primitive.


  • Options
  • A. function
  • B. signal
  • C. semicolon
  • D. colon

  • Correct Answer
  • colon 


  • Flip-Flops problems


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    • 1. The 74121 nonretriggerable multivibrator can have the output pulse set by a single external component. This component is a(n) ________.

    • Options
    • A. capacitor
    • B. inductor
    • C. resistor
    • D. LED
    • Discuss
    • 2. An edge-triggered flip-flop can change states only when ________.

    • Options
    • A. the trigger is HIGH
    • B. the D input is HIGH
    • C. the trigger is LOW
    • D. the trigger input changes levels
    • Discuss
    • 3. The inputs on a 7474 D flip-flop are S, R, D, and CLK ________ is/are synchronous.

    • Options
    • A. Only S
    • B. S and R
    • C. Only D
    • D. All of the above.
    • Discuss
    • 4. Setup time specifies ________.

    • Options
    • A. the minimum time for the control levels to be maintained on the inputs prior to the triggering edge of the clock in order for data to be reliably clocked into the FF
    • B. the maximum time interval required for the control levels to remain on the inputs before the triggering edge of the clock in order for the data to be reliably clocked out of the FF
    • C. how long the operator has in order to get the flip-flop running before the maximum power level is exceeded
    • D. how long it takes the output to change states after the clock has transitioned
    • Discuss
    • 5. The key to edge-triggered sequential circuits in VHDL is the ________.

    • Options
    • A. ARCHITECTURE
    • B. PROCESS
    • C. FUNCTION
    • D. VARIABLE
    • Discuss
    • 6. In synchronous systems, the exact times at which any output can change state are determined by a signal commonly called the ________.

    • Options
    • A. traffic
    • B. D
    • C. flip-flop
    • D. clock
    • Discuss
    • 7. Assume a J-K flip-flop has 1s on the J and K inputs. The next clock pulse will cause the output to ________.

    • Options
    • A. set
    • B. reset
    • C. latch
    • D. toggle
    • Discuss
    • 8. If an input is activated by a signal transition, it is ________.

    • Options
    • A. hair-triggered
    • B. line-triggered
    • C. pulse-triggered
    • D. edge-triggered
    • Discuss
    • 9. Most people would prefer to use ________ over HDL.

    • Options
    • A. graphic descriptions
    • B. functions
    • C. VHDL
    • D. AHDL
    • Discuss
    • 10. The major advantage of a Schmitt trigger input is that it ________.

    • Options
    • A. avoids erratic triggering
    • B. has more triggering methods
    • C. has a wider range of outputs
    • D. can be retriggered
    • Discuss


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