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- Question
Setup time specifies ________.
Options- A. the minimum time for the control levels to be maintained on the inputs prior to the triggering edge of the clock in order for data to be reliably clocked into the FF
- B. the maximum time interval required for the control levels to remain on the inputs before the triggering edge of the clock in order for the data to be reliably clocked out of the FF
- C. how long the operator has in order to get the flip-flop running before the maximum power level is exceeded
- D. how long it takes the output to change states after the clock has transitioned
- Correct Answer
- the minimum time for the control levels to be maintained on the inputs prior to the triggering edge of the clock in order for data to be reliably clocked into the FF
- 1. The key to edge-triggered sequential circuits in VHDL is the ________.
Options- A. ARCHITECTURE
- B. PROCESS
- C. FUNCTION
- D. VARIABLE Discuss
- 2. An input which can only be accepted when an enable or trigger is present is called asynchronous.
Options- A. True
- B. False Discuss
- 3. The 7476 and 74LS76 are both dual flip-flops.
Options- A. True
- B. False Discuss
- 4. An astable multivibrator is sometimes referred to as a clock.
Options- A. True
- B. False Discuss
- 5. It takes four flip-flops to act as a divide-by-4 frequency divider.
Options- A. True
- B. False Discuss
- 6. The inputs on a 7474 D flip-flop are S, R, D, and CLK ________ is/are synchronous.
Options- A. Only S
- B. S and R
- C. Only D
- D. All of the above. Discuss
- 7. An edge-triggered flip-flop can change states only when ________.
Options- A. the trigger is HIGH
- B. the D input is HIGH
- C. the trigger is LOW
- D. the trigger input changes levels Discuss
- 8. The 74121 nonretriggerable multivibrator can have the output pulse set by a single external component. This component is a(n) ________.
Options- A. capacitor
- B. inductor
- C. resistor
- D. LED Discuss
- 9. In VHDL, each instance of a component is given a name followed by a ________ and the name of the library primitive.
Options- A. function
- B. signal
- C. semicolon
- D. colon Discuss
- 10. In synchronous systems, the exact times at which any output can change state are determined by a signal commonly called the ________.
Options- A. traffic
- B. D
- C. flip-flop
- D. clock Discuss
Flip-Flops problems
Search Results
Correct Answer: PROCESS
Correct Answer: False
Correct Answer: True
Correct Answer: True
Correct Answer: False
Correct Answer: All of the above.
Correct Answer: the trigger input changes levels
Correct Answer: capacitor
Correct Answer: colon
Correct Answer: clock
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