logo

CuriousTab

CuriousTab

Discussion

Home ‣ Digital Electronics ‣ Flip-Flops Comments
  • Question

  • A positive edge-triggered flip-flop changes states with a HIGH-to-LOW transition on the clock input.


  • Options
  • A. True
  • B. False

  • Correct Answer
  • False 

    • Flip-Flops problems

    Search Results

    • 1. Some flip-flops have invalid states.

    • Options
    • A. True
    • B. False
      • Discuss
    • 2. When the output of the NOR gate S-R flip-flop is and , the inputs are .

    • Options
    • A. True
    • B. False
      • Discuss
    • 3. Inputs that cause the output of a flip-flop to change instantaneously are asynchronous.

    • Options
    • A. True
    • B. False
      • Discuss
    • 4. Generally, a flip-flop's hold time is short enough so that its output will go to a state determined by the logic levels present at its synchronous control inputs just prior to the active clock transition.

    • Options
    • A. True
    • B. False
      • Discuss
    • 5. A one-shot circuit is also known as a timer.

    • Options
    • A. True
    • B. False
      • Discuss
    • 6. ICs can perform sequential operations, including counting and data shifting.

    • Options
    • A. True
    • B. False
      • Discuss
    • 7. It takes four flip-flops to act as a divide-by-4 frequency divider.

    • Options
    • A. True
    • B. False
      • Discuss
    • 8. An astable multivibrator is sometimes referred to as a clock.

    • Options
    • A. True
    • B. False
      • Discuss
    • 9. The 7476 and 74LS76 are both dual flip-flops.

    • Options
    • A. True
    • B. False
      • Discuss
    • 10. An input which can only be accepted when an enable or trigger is present is called asynchronous.

    • Options
    • A. True
    • B. False
      • Discuss

    Comments

    There are no comments.
Enter a new Comment




Aptitude

Engineering

Programming

Reasoning

Links

Copyright ©CuriousTab. All rights reserved.