Generally, a flip-flop's hold time is short enough so that its output will go to a state determined by the logic levels present at its synchronous control inputs just prior to the active clock transition.
Options
A. True
B. False
Correct Answer
True
More questions
1. The content of a simple programmable logic device (PLD) consists of:
Options
A. fuse-link arrays
B. thousands of basic logic gates
C. advanced sequential logic functions
D. thousands of basic logic gates and advanced sequential logic functions