Discussion
Home ‣ Digital Electronics ‣ Flip-Flops See What Others Are Saying!
- Question
Generally, a flip-flop's hold time is short enough so that its output will go to a state determined by the logic levels present at its synchronous control inputs just prior to the active clock transition.
Options- A. True
- B. False
- Correct Answer
- True
- 1. A J-K flip-flop and associated waveforms are shown below. The circuit is operating properly.
Options- A. True
- B. False Discuss
- 2. Convert the following binary number to decimal.
010112
Options- A. 11
- B. 35
- C. 15
- D. 10 Discuss
- 3. Expanders make it possible to increase the number of terms in a programmable SOP operation.
Options- A. True
- B. False Discuss
- 4. The design concept of using building blocks of circuits in a PLD program is called a(n):
Options- A. hierarchical design.
- B. architectural design.
- C. digital design.
- D. verilog. Discuss
- 5. On a master-slave flip-flop, when is the master enabled?
Options- A. when the gate is LOW
- B. when the gate is HIGH
- C. both of the above
- D. neither of the above Discuss
- 6. Hexadecimal is used to encode BCD numbers.
Options- A. True
- B. False Discuss
- 7. If one input to a 2-input AND gate is HIGH, the output reflects the other input.
Options- A. True
- B. False Discuss
- 8. The stack is a data storage area in RAM used by certain microprocessor operations.
Options- A. True
- B. False Discuss
- 9. Eight states are in an 8-bit Johnson counter sequence.
Options- A. True
- B. False Discuss
- 10. Convert BCD 0001 0010 0110 to binary.
Options- A. 1111110
- B. 1111101
- C. 1111000
- D. 1111111 Discuss
More questions
Correct Answer: False
Correct Answer: 11
Correct Answer: True
Correct Answer: hierarchical design.
Correct Answer: when the gate is HIGH
Correct Answer: False
Correct Answer: True
Correct Answer: True
Correct Answer: False
Correct Answer: 1111110
Comments
There are no comments.More in Digital Electronics:
Programming
Copyright ©CuriousTab. All rights reserved.