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Home Digital Electronics Flip-Flops Comments

  • Question
  • A gated S-R flip-flop goes into the SET condition when S is HIGH, R is LOW, and EN is HIGH.


  • Options
  • A. True
  • B. False

  • Correct Answer
  • True 


  • Flip-Flops problems


    Search Results


    • 1. VHDL was created as a very flexible language and it allows us to define the operation of clocked devices in the code without relying on logic primitives.

    • Options
    • A. True
    • B. False
    • Discuss
    • 2. Connecting components together using HDL is not difficult.

    • Options
    • A. True
    • B. False
    • Discuss
    • 3. The Boolean equation for the exclusive-OR function is ________.

    • Options
    • A.
    • B.
    • C.
    • D.
    • Discuss
    • 4. Parity generation and checking is used to detect ________.

    • Options
    • A. which of two numbers is greater
    • B. errors in binary data transmission
    • C. errors in arithmetic in computers
    • D. when a binary counter counts incorrectly
    • Discuss
    • 5. Except for ________, STD_LOGIC may have the following values.

    • Options
    • A. 'z'
    • B. 'U'
    • C. '?'
    • D. 'L'
    • Discuss
    • 6. All multivibrators require feedback.

    • Options
    • A. True
    • B. False
    • Discuss
    • 7. Most basic latches and flip-flops are available in IC packages of eight latches or flip-flops with a common clock.

    • Options
    • A. True
    • B. False
    • Discuss
    • 8. The 7475 is an example of an IC D latch (also called a bistable latch) that contains four transparent D latches.

    • Options
    • A. True
    • B. False
    • Discuss
    • 9. VHDL does require a special designation for an output with a feedback.

    • Options
    • A. True
    • B. False
    • Discuss
    • 10. Pulse-triggered flip-flops are identified by a bubble on the Q output terminal.

    • Options
    • A. True
    • B. False
    • Discuss


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