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  • Question
  • The ________ circuit produces a HIGH output whenever the two inputs are equal.


  • Options
  • A. exclusive-AND
  • B. exclusive-NAND
  • C. exclusive-NOR
  • D. exclusive-OR

  • Correct Answer
  • exclusive-NOR 


  • Combinational Logic Circuits problems


    Search Results


    • 1. ________ is a correct combination for an ODD-parity data transmission system.

    • Options
    • A. data = 1101 1011
      parity = 1
    • B. data = 1101 0010
      parity = 0
    • C. data = 0001 0101
      parity = 1
    • D. data = 1010 1111
      parity = 0
    • Discuss
    • 2. VHDL is very strict in the way it allows us to assign and compare ________ such as signals, variables, constants, and literals.

    • Options
    • A. objects
    • B. LOGIC_VECTORS
    • C. designs
    • D. arrays
    • Discuss
    • 3. When an open occurs on the input of a CMOS gate, the output will ________.

    • Options
    • A. go LOW, because there is no current in an open circuit
    • B. react as if the open input were a HIGH
    • C. go HIGH, since full voltage appears across an open
    • D. be unpredictable; it may go HIGH or LOW
    • Discuss
    • 4. The largest truth table that can be implemented directly with an 8-line-to-1-line MUX has ________.

    • Options
    • A. 3 rows
    • B. 4 rows
    • C. 8 rows
    • D. 16 rows
    • Discuss
    • 5. The output of a gate has an internal short; a current tracer will ________.

    • Options
    • A. identify the defective gate
    • B. show whether the gate is shorted to Vcc or ground
    • C. probably not be able to locate the problem
    • D. be able to identify the defective load node
    • Discuss
    • 6. The addition of two signed numbers in the 2's complement system can cause overflow. For overflow to occur both numbers must ________.

    • Options
    • A. be positive
    • B. be negative
    • C. have the same sign
    • D. have opposite signs
    • Discuss
    • 7. After each circuit in a subsection of a VHDL program has been ________, they can be combined and the subsection can be tested.

    • Options
    • A. designed
    • B. tested
    • C. engineered
    • D. produced
    • Discuss
    • 8. Except for ________, STD_LOGIC may have the following values.

    • Options
    • A. 'z'
    • B. 'U'
    • C. '?'
    • D. 'L'
    • Discuss
    • 9. Parity generation and checking is used to detect ________.

    • Options
    • A. which of two numbers is greater
    • B. errors in binary data transmission
    • C. errors in arithmetic in computers
    • D. when a binary counter counts incorrectly
    • Discuss
    • 10. The Boolean equation for the exclusive-OR function is ________.

    • Options
    • A.
    • B.
    • C.
    • D.
    • Discuss


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