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  • Question
  • The output of a gate has an internal short; a current tracer will ________.


  • Options
  • A. identify the defective gate
  • B. show whether the gate is shorted to Vcc or ground
  • C. probably not be able to locate the problem
  • D. be able to identify the defective load node

  • Correct Answer
  • identify the defective gate 


  • Combinational Logic Circuits problems


    Search Results


    • 1. One reason for using the sum-of-products form is that it can be implemented using all ________ gates without much difficulty.

    • Options
    • A. NOR
    • B. NAND
    • C. AND
    • D. DOOR
    • Discuss
    • 2. The simplified form of is ________.

    • Options
    • A.
    • B.
    • C.
    • D.
    • Discuss
    • 3. When grouping cells within a K-map, the cells must be combined in groups of ________.

    • Options
    • A. 2's
    • B. 1, 2, 4, 8, etc.
    • C. 4's
    • D. 3's
    • Discuss
    • 4. The ________ series of IC's are pin, function, and voltage-level compatible with the 74 series IC's.

    • Options
    • A. ALS
    • B. CMOS
    • C. HCT
    • D. 2N
    • Discuss
    • 5. The ________ circuit produces a HIGH output whenever the two inputs are unequal.

    • Options
    • A. exclusive-AND
    • B. exclusive-NOR
    • C. exclusive-OR
    • D. inexclusive-OR
    • Discuss
    • 6. The largest truth table that can be implemented directly with an 8-line-to-1-line MUX has ________.

    • Options
    • A. 3 rows
    • B. 4 rows
    • C. 8 rows
    • D. 16 rows
    • Discuss
    • 7. When an open occurs on the input of a CMOS gate, the output will ________.

    • Options
    • A. go LOW, because there is no current in an open circuit
    • B. react as if the open input were a HIGH
    • C. go HIGH, since full voltage appears across an open
    • D. be unpredictable; it may go HIGH or LOW
    • Discuss
    • 8. VHDL is very strict in the way it allows us to assign and compare ________ such as signals, variables, constants, and literals.

    • Options
    • A. objects
    • B. LOGIC_VECTORS
    • C. designs
    • D. arrays
    • Discuss
    • 9. ________ is a correct combination for an ODD-parity data transmission system.

    • Options
    • A. data = 1101 1011
      parity = 1
    • B. data = 1101 0010
      parity = 0
    • C. data = 0001 0101
      parity = 1
    • D. data = 1010 1111
      parity = 0
    • Discuss
    • 10. The ________ circuit produces a HIGH output whenever the two inputs are equal.

    • Options
    • A. exclusive-AND
    • B. exclusive-NAND
    • C. exclusive-NOR
    • D. exclusive-OR
    • Discuss


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