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Home ‣ Digital Electronics ‣ Combinational Logic Circuits Comments
  • Question

  • This is an example of a POS expression:

    This is an example of a POS expression: True False


  • Options
  • A. True
  • B. False

  • Correct Answer
  • True 

    • Combinational Logic Circuits problems

    Search Results

    • 1. The look-ahead carry method suffers from propagation delays.

    • Options
    • A. True
    • B. False
      • Discuss
    • 2. An encoder in which the highest and lowest value input digits are encoded simultaneously is known as a priority encoder.

    • Options
    • A. True
    • B. False
      • Discuss
    • 3. The SUBDESIGN section defines the input and output of the logic circuit block.

    • Options
    • A. True
    • B. False
      • Discuss
    • 4. NOR gates can be used to construct AND gates.

    • Options
    • A. True
    • B. False
      • Discuss
    • 5. In VHDL, local signals are declared in the VARIABLE section, which is placed between the SUBDESIGN section and the logic section.

    • Options
    • A. True
    • B. False
      • Discuss
    • 6. The Boolean equation results from this Karnaugh map.


    • Options
    • A. True
    • B. False
      • Discuss
    • 7. A square in the top row of a K-map is considered to be adjacent to its corresponding square in the bottom row.

    • Options
    • A. True
    • B. False
      • Discuss
    • 8. The following combination is correct for an EVEN parity data transmission system:
      data = 100111100 and parity = 0

    • Options
    • A. True
    • B. False
      • Discuss
    • 9. A data selector is also called a demultiplexer.

    • Options
    • A. True
    • B. False
      • Discuss
    • 10. Three select lines are required to address four data input lines.

    • Options
    • A. True
    • B. False
      • Discuss

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