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Home Digital Electronics Describing Logic Circuits See What Others Are Saying!
  • Question
  • The given figure shows the correct logic implementation of the distributive law.

    The given figure shows the correct logic implementation of the distributive law. True False


  • Options
  • A. True
  • B. False

  • Correct Answer
  • True 


  • More questions

    • 1. In the frequency counter, the length of time for the ________ to be enabled can be selected with the range select input.

    • Options
    • A. display register
    • B. frequency prescaler
    • C. BCD counter
    • D. signal generator
    • Discuss
    • 2. How many pins does the 4049 IC have?

    • Options
    • A. 14
    • B. 16
    • C. 18
    • D. 20
    • Discuss
    • 3. In a counter-ramp A/D converter, the end-of-conversion line must be tied back to the clear input of the counter to change the circuit to perform continuous conversions.

    • Options
    • A. True
    • B. False
    • Discuss
    • 4. Subtract the following binary numbers.

      0101 1000   1010 0011   1101 1110
      ?0010 0011   ?0011 1000   ?0101 0111

    • Options
    • A. 0011  0100    0110  1010    1000  0110
    • B. 0011  0101    0110  1011    1000  0111
    • C. 0011  0101    0110  1010    1000  0111
    • D. 0011  0101    0110  1010    1000  0110
    • Discuss
    • 5. One advantage that MOSFET transistors have over bipolar transistors is ________.

    • Options
    • A. high input impedance
    • B. higher switching speed
    • C. low input impedance
    • D. reduced propagation delay
    • Discuss
    • 6. What is meant by parallel load of a counter?

    • Options
    • A. Each FF is loaded with data on a separate clock.
    • B. The counter is cleared.
    • C. All FFs are preset with data.
    • Discuss
    • 7. For a one-shot application, how can HDL code be used to make a circuit respond once to each positive transition on its trigger input?

    • Options
    • A. By using a counter
    • B. By using an active clock
    • C. By using an immediate reload
    • D. By using edge trapping
    • Discuss
    • 8. Which is not a type of PLD?

    • Options
    • A. SPLD
    • B. HPLD
    • C. CPLD
    • D. FPGA
    • Discuss
    • 9. An astable multivibrator is a circuit that ________.

    • Options
    • A. has two stable states
    • B. is free-running
    • C. produces a continuous output signal
    • D. is free-running and produces a continuous output signal
    • Discuss
    • 10. If a memory design allows a storage location to be accessed without first sequencing through other locations, it is called Random Access Memory.

    • Options
    • A. True
    • B. False
    • Discuss


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