The stability of the ADC process can be improved by using a(n) ________ to hold the analog voltage constant while the A/D conversion is taking place.
Options
A. sample-and-hold circuit
B. op-amp comparator
C. NPN amp
D. current loop
Correct Answer
sample-and-hold circuit
Interfacing to the Analog World problems
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1. A 4-bit stairstep-ramp A/D converter has a clock frequency of 100 kHz and a maximum input of 10 V, and has 6 V applied to the input. The conversion time will be ________.
6. There are many applications in which analog data must be digitized and transferred into a computer's memory. The process by which the computer acquires these digitized analog data is referred to as ________.