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Home ‣ Digital Electronics ‣ Shift Registers Comments
  • Question

  • In a 74164 8-bit shift register, in order for the parallel data output to be synchronously loaded on the negative clock edge, the parallel enable input is LOW.


  • Options
  • A. True
  • B. False

  • Correct Answer
  • False 

    • Shift Registers problems

    Search Results

    • 1. Parallel load means to load all flip-flops at the same time.

    • Options
    • A. True
    • B. False
      • Discuss
    • 2. The 74194 4-bit bidirectional universal shift register has a wide range of applications.

    • Options
    • A. True
    • B. False
      • Discuss
    • 3. When is LOW, the data are shifted one bit per clock pulse.

    • Options
    • A. True
    • B. False
      • Discuss
    • 4. Eight states are in an 8-bit Johnson counter sequence.

    • Options
    • A. True
    • B. False
      • Discuss
    • 5. A stepper motor makes its rotation in smooth continuous motion.

    • Options
    • A. True
    • B. False
      • Discuss
    • 6. A stage is two storage elements in a register.

    • Options
    • A. True
    • B. False
      • Discuss
    • 7. The ring and Johnson shift counters are uncommon circuits that are similar to synchronous counters.

    • Options
    • A. True
    • B. False
      • Discuss
    • 8. A type of shift register that requires access to the Q outputs of all stages is ________.

    • Options
    • A. parallel in/serial out
    • B. serial in/parallel out
    • C. serial in/serial out
    • D. a bidirectional shift register
      • Discuss
    • 9. A Johnson counter, constructed with N flip-flops, has how many unique states?

    • Options
    • A. N
    • B. 2N
    • C. 2N
    • D. N2
      • Discuss
    • 10. Assume a LOW logic level is placed on the SHIFT/LOAD input of a 74195 shift register. The output will change ________.

    • Options
    • A. immediately
    • B. if the CLOCK is also LOW
    • C. on the next clock leading edge
    • D. depending on the J and K inputs
      • Discuss

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