Discussion
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- Question
In VHDL, the architecture declaration always begins with the ________ of variable signals or components that will be used in the concurrent description between BEGIN and END.
Options- A. type
- B. vectors
- C. functions
- D. declarations
- Correct Answer
- declarations
- 1. Output will be a LOW for any case when one or more inputs are zero for a(n):
Options- A. OR gate
- B. NOT gate
- C. AND gate
- D. NOR gate Discuss
- 2. The sum of 11101 + 10111 equals ________.
Options- A. 110011
- B. 100001
- C. 110100
- D. 100100 Discuss
- 3. Hex is often used in digital applications as a shorthand way to represent strings of bits.
Options- A. True
- B. False Discuss
- 4. Four cascaded modulus-10 counters have an overall modulus of ________.
Options- A. 10
- B. 100
- C. 1,000
- D. 10,000 Discuss
- 5. VHDL is not a new language.
Options- A. True
- B. False Discuss
- 6. Which is not a removable drive?
Options- A. Zip
- B. Jaz
- C. Hard
- D. SuperDisk Discuss
- 7. Which microprocessor has multiplexed data and address lines?
Options- A. 8086/8088
- B. 80286
- C. 80386
- D. Pentium Discuss
- 8. One of the stages in a register consists of a latch.
Options- A. True
- B. False Discuss
- 9. A VHDL component is a predefined logic function.
Options- A. True
- B. False Discuss
- 10. L1 is known as ________.
Options- A. primary cache
- B. secondary cache
- C. DRAM
- D. SRAM Discuss
More questions
Correct Answer: AND gate
Correct Answer: 110100
Correct Answer: True
Correct Answer: 10,000
Correct Answer: True
Correct Answer: Hard
Correct Answer: 8086/8088
Correct Answer: True
Correct Answer: False
Correct Answer: primary cache
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