Discussion
Home ‣ Digital Electronics ‣ Logic Gates See What Others Are Saying!
- Question
The gates in this figure are implemented using TTL logic. If the input of the inverter is open, and you apply logic pulses to point B, the output of the AND gate will be ________.
Options- A. a steady LOW
- B. a steady HIGH
- C. an undefined level
- D. pulses
- Correct Answer
- a steady LOW
- 1. Cascade chains are closely associated with ________.
Options- A. CLBs
- B. SOP functions
- C. logic expansion
- D. all of the above Discuss
- 2. A ________ is user-programmable memory that cannot be erased and reprogrammed.
Options- A. ROM
- B. EPROM
- C. EEPROM
- D. PROM Discuss
- 3. When performing subtraction by addition in the 2's-complement system:
Options- A. the minuend and the subtrahend are both changed to the 2's-complement.
- B. the minuend is changed to 2's-complement and the subtrahend is left in its original form.
- C. the minuend is left in its original form and the subtrahend is changed to its 2's-complement.
- D. the minuend and subtrahend are both left in their original form. Discuss
- 4. The mask ROM is ________.
Options- A. MOS technology
- B. diode technology
- C. resistor-diode technology
- D. DROM technology Discuss
- 5. A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used on each of the input terminals, but the output indication does not change. What is wrong?
Options- A. The dim indication on the logic probe indicates that the supply voltage is probably low.
- B. The output of the gate appears to be open.
- C. The dim indication is the result of a bad ground connection on the logic probe.
- D. The gate is a tristate device. Discuss
- 6. The range of positive numbers when using an eight-bit two's-complement system is:
Options- A. 0 to 64
- B. 0 to 100
- C. 0 to 127
- D. 0 to 256 Discuss
- 7. With a 200 kHz clock frequency, eight bits can be serially entered into a shift register in ________.
Options- A. 4 ?s
- B. 40 ?s
- C. 400 ?s
- D. 40 ms Discuss
- 8. What is meant by parallel load of a shift register?
Options- A. All FFs are preset with data.
- B. Each FF is loaded with data, one at a time. Discuss
- 9. Why are ROMs called nonvolatile memory?
Options- A. They lose memory when power is removed.
- B. They do not lose memory when power is removed. Discuss
- 10. Dynamic memory cells store a data bit in a ________.
Options- A. diode
- B. resistor
- C. capacitor
- D. flip-flop Discuss
More questions
Correct Answer: all of the above
Correct Answer: PROM
Correct Answer: the minuend is left in its original form and the subtrahend is changed to its 2's-complement.
Correct Answer: MOS technology
Correct Answer: The output of the gate appears to be open.
Correct Answer: 0 to 127
Correct Answer: 40 ?s
Correct Answer: All FFs are preset with data.
Correct Answer: They do not lose memory when power is removed.
Correct Answer: capacitor
Comments
There are no comments.More in Digital Electronics:
Programming
Copyright ©CuriousTab. All rights reserved.