An op-amp has very ________. high voltage gain high input impedance low output i

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all of the above

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1. In a typical IC monostable multivibrator circuit, at the falling edge of the trigger input, the output switches HIGH for a period of time determined by the ________.
Options
A. value of the RC timing components
B. amplitude of the input trigger
C. frequency of the input trigger
D. magnitude of the dc supply voltage

3. ________ is a correct combination for an ODD-parity data transmission system.
Options
A. data = 1101 1011
parity = 1
B. data = 1101 0010
parity = 0
C. data = 0001 0101
parity = 1
D. data = 1010 1111
parity = 0

8. The symbols on this flip-flop device indicate ________.
Options
A. triggering takes place on the negative-going edge of the CLK pulse
B. triggering takes place on the positive-going edge of the CLK pulse
C. triggering can take place anytime during the HIGH level of the CLK waveform
D. triggering can take place anytime during the LOW level of the CLK waveform

9. The data transmission system shown in below has a problem; the parity error output is always high. A logic analyzer is used to examine the system and shows that the DATA IN on the left matches the DATA OUT on right. What might be causing the problem?
Options
A. The error gate could be defective.
B. The storage circuit could be defective.
C. The parity checker could be bad.
D. Any of the above.

10. Which of the following statements apply to CMOS devices?
Options
A. The devices should not be inserted into circuits with the power on.
B. All tools, test equipment, and metal workbenches should be tied to earth ground.
C. The devices should be stored and shipped in antistatic tubes or conductive foam.
D. All of the above.

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