In the keypad application, just after the 4 ms mark the simulation imitates the

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Question
In the keypad application, just after the 4 ms mark the simulation imitates the release of the key by changing the column value back to F hex, which causes the d output to go into its Hi-Z state. On the next rising clock edge, what happens to dav?
Options
A. It goes HIGH.
B. It goes LOW.
C. It goes to Hi-Z.
D. It goes to 1111H.

Correct Answer

It goes LOW.

Digital System Projects Using HDL problems

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1. In a frequency counter, what happens at high frequencies when the sampling interval is too long?
Options
A. The counter works fine.
B. The counter undercounts the frequency.
C. The measurement is less precise.
D. The counter overflows.

2. Which is not a step in strategic planning for HDL development?
Options
A. There must be a way to test each piece.
B. Each block must fit together to make up the whole system.
C. The names of each input and output must be known.
D. The exact operation of each block must be thoroughly defined and understood.

3. In the digital clock project, when does the PM indicator go high?
Options
A. Never
B. Going from 11:59:59 to 12:00:00
C. Going from 12:59:59 to 01:00:00
D. On the falling edge of the clock after enable goes high

5. In the digital clock project, what is the frequency of the MOD-6 counter in the minutes section?
Options
A. 1 pulse per minute
B. 6 pulses per minute
C. 10 pulses per minute
D. 1 pulse per hour

6. A binary-weighted-input digital-to-analog converter has a feedback resistor, R_f, of 12 kΩ. If 50 µA of current is through the resistor, voltage out of the circuit is ________.
Options
A. 0.6 V
B. ?0.6 V
C. 0.1 V
D. ?0.1 V

8. In a digital reproduction of an analog curve, accuracy can be increased by ________.
Options
A. sampling the curve more often
B. sampling the curve less often
C. decreasing the number of bits used to represent each sampled value
D. all of the above

9. Which of the following best defines Nyquist frequency?
Options
A. The frequency of resonance for the filtering circuit
B. The second harmonic
C. The lower frequency limit of sampling
D. The highest frequency component of a given analog signal

10. Settling time is normally defined as the time it takes a DAC to settle within ________.
Options
A. 1/8 LSB of its final value when a change occurs in the input code
B. 1/4 LSB of its final value when a change occurs in the input code
C. 1/2 LSB of its final value when a change occurs in the input code
D. 1 LSB of its final value when a change occurs in the input code

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