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Digital Electronics
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Digital System Projects Using HDL
Comments
Question
In the frequency counter, what is the function of the Schmitt trigger circuit?
Options
A. To reduce input noise
B. To condition the input signal
C. To convert non-square waveforms
D. To provide a usable signal to the display unit
Correct Answer
To convert non-square waveforms
Digital System Projects Using HDL problems
Search Results
1. In the digital clock project, the purpose of the frequency prescaler is to:
Options
A. find the basic frequency.
B. transform a 60 pps input to a 1 pps timing signal.
C. prevent the clock from exceeding 12:59:59.
D. allow the BCD display to have a value from 00?59.
Show Answer
Scratch Pad
Discuss
Correct Answer: transform a 60 pps input to a 1 pps timing signal.
2. Which is not a major block of an HDL frequency counter?
Options
A. Display register
B. Decoder/display
C. Timing and control unit
D. Bit shifter
Show Answer
Scratch Pad
Discuss
Correct Answer: Bit shifter
3. The accuracy of the frequency counter depends on the:
Options
A. system clock frequency.
B. number of displayed digits.
C. sampling rate.
D. display update rate.
Show Answer
Scratch Pad
Discuss
Correct Answer: system clock frequency.
4. Why should a real hardware functional test be performed on the HDL stepper motor design?
Options
A. To check the speed of the software
B. To check the current levels in the motor
C. To check the voltage levels of the real outputs
D. To provide a fully operational system
Show Answer
Scratch Pad
Discuss
Correct Answer: To check the speed of the software
5. What does the major block of an HDL code emulation of a keypad include?
Options
A. A sequencer
B. A clock
C. A multiplexer
D. A ring counter
Show Answer
Scratch Pad
Discuss
Correct Answer: A ring counter
6. In a digital clock application, the basic frequency must be divided down to:
Options
A. 1 Hz.
B. 60 Hz.
C. 100 Hz.
D. 1000 Hz.
Show Answer
Scratch Pad
Discuss
Correct Answer: 1 Hz.
7. Which is not a step used to define the scope of an HDL project?
Options
A. Are the inputs and outputs active HIGH or active LOW?
B. A clear vision of how to make each block work
C. What are the speed requirements?
D. How many bits of data are needed?
Show Answer
Scratch Pad
Discuss
Correct Answer: A clear vision of how to make each block work
8. In the frequency counter, when is the new count stored in the display register?
Options
A. After disabling the counter
B. When the count buffer is full
C. After the sample interval is set
D. When the timing and control block has put it there
Show Answer
Scratch Pad
Discuss
Correct Answer: After disabling the counter
9. In the digital clock project, what is the frequency of the MOD-6 counter in the minutes section?
Options
A. 1 pulse per minute
B. 6 pulses per minute
C. 10 pulses per minute
D. 1 pulse per hour
Show Answer
Scratch Pad
Discuss
Correct Answer: 1 pulse per hour
10. In the frequency counter, if the clock generator produces a 100 kHz system clock signal, how many decade counters are required to measure 1 Hz?
Options
A. 6
B. 5
C. 4
D. 3
Show Answer
Scratch Pad
Discuss
Correct Answer: 5
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