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- Question
List three basic blocks in the digital clock project.
Options- A. MOD-60, MOD-12 counters
- B. MOD-5, MOD-10, MOD-12 counters
- C. MOD-60, MOD-10 counters
- D. MOD-6, MOD-12, and MOD-10 counters
- Correct Answer
- MOD-6, MOD-12, and MOD-10 counters
- 1. For the frequency counter, which is not a control signal from the control and timing block?
Options- A. Clear
- B. Enable
- C. Reset
- D. Store Discuss
- 2. In an HDL stepper motor design, why is there more than one mode?
Options- A. To change the speed of the stepper motor
- B. To change the direction of the stepper motor
- C. To direct drive the stepper motor
- D. All of the above Discuss
- 3. Logic circuits that are designated as buffers, drivers, or buffer/drivers are designed to have:
Options- A. a greater current/voltage capability than an ordinary logic circuit.
- B. greater input current/voltage capability than an ordinary logic circuit.
- C. a smaller output current/voltage capability than an ordinary logic.
- D. greater input and output current/voltage capability than an ordinary logic circuit. Discuss
- 4. Which of the following summarizes the important features of ECL?
Options- A. Low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption
- B. Good noise immunity, negative logic, high frequency capability, low power dissipation, and short propagation time
- C. Slow propagation time, high frequency response, low power consumption, and high output voltage swings
- D. Poor noise immunity, positive supply voltage operation, good low frequency operation, and low power Discuss
- 5. What type of circuit is represented in the given figure, and which statement best describes its operation?
Options- A. It is a tristate inverter. When the ENABLE input is HIGH, the output is effectively an open circuit?it is neither LOW nor HIGH.
- B. It is a programmable inverter. It can be programmed to function as either an active LOW or an active HIGH inverter.
- C. It is an active LOW buffer, which can be turned on and off by the ENABLE input.
- D. None of the above. Discuss
- 6. In the keypad application, what does the preset state of the ring counter define?
Options- A. The proper output of the column encoder
- B. The NANDing of the rows
- C. The NANDing of the columns
- D. The proper output of the row encoder Discuss
- 7. Which is not a step that should be followed in project management?
Options- A. Overall definition
- B. System documentation
- C. Synthesis and testing
- D. System integration Discuss
- 8. What are two ways to remember the current state of a counter in VHDL?
Options- A. With FUNCTIONS and PROCESS
- B. With counters and timers
- C. With SIGNAL and VARIABLE
- D. With bit types Discuss
- 9. In a full-step sequence involving two flip-flops driving four coils of a stepper motor, how far will the stepper motor step?
Options- A. 90°
- B. 45°
- C. 30°
- D. 15° Discuss
- 10. In the digital clock project, what type of counter is used to count to 59 seconds?
Options- A. MOD-60
- B. MOD-6
- C. BCD
- D. BCD followed by a MOD-6 Discuss
Digital System Projects Using HDL problems
Search Results
Correct Answer: Reset
Correct Answer: All of the above
Correct Answer: a greater current/voltage capability than an ordinary logic circuit.
Correct Answer: Low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption
Correct Answer: It is a tristate inverter. When the ENABLE input is HIGH, the output is effectively an open circuit?it is neither LOW nor HIGH.
Correct Answer: The proper output of the row encoder
Correct Answer: System documentation
Correct Answer: With SIGNAL and VARIABLE
Correct Answer: 15°
Correct Answer: BCD followed by a MOD-6
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