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- Question
In an HDL stepper motor design, why is there more than one mode?
Options- A. To change the speed of the stepper motor
- B. To change the direction of the stepper motor
- C. To direct drive the stepper motor
- D. All of the above
- Correct Answer
- All of the above
- 1. Logic circuits that are designated as buffers, drivers, or buffer/drivers are designed to have:
Options- A. a greater current/voltage capability than an ordinary logic circuit.
- B. greater input current/voltage capability than an ordinary logic circuit.
- C. a smaller output current/voltage capability than an ordinary logic.
- D. greater input and output current/voltage capability than an ordinary logic circuit. Discuss
- 2. Which of the following summarizes the important features of ECL?
Options- A. Low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption
- B. Good noise immunity, negative logic, high frequency capability, low power dissipation, and short propagation time
- C. Slow propagation time, high frequency response, low power consumption, and high output voltage swings
- D. Poor noise immunity, positive supply voltage operation, good low frequency operation, and low power Discuss
- 3. What type of circuit is represented in the given figure, and which statement best describes its operation?
Options- A. It is a tristate inverter. When the ENABLE input is HIGH, the output is effectively an open circuit?it is neither LOW nor HIGH.
- B. It is a programmable inverter. It can be programmed to function as either an active LOW or an active HIGH inverter.
- C. It is an active LOW buffer, which can be turned on and off by the ENABLE input.
- D. None of the above. Discuss
- 4. What is unique about TTL devices such as the 74S00?
Options- A. The gate transistors are silicon (S), and the gates therefore have lower values of leakage current.
- B. The S denotes the fact that a single gate is present in the IC rather than the usual package of 2?6 gates.
- C. The S denotes a slow version of the device, which is a consequence of its higher power rating.
- D. The devices use Schottky transistors and diodes to prevent them from going into saturation; this results in faster turn on and turn off times, which translates into higher frequency operation. Discuss
- 5. What must be done to interface TTL to CMOS?
Options- A. A dropping resistor must be used on the CMOS 12 V supply to reduce it to 5 V for the TTL.
- B. As long as the CMOS supply voltage is 5 V, they can be interfaced; however, the fan-out of the TTL is limited to five CMOS gates.
- C. A 5 V Zener diode must be placed across the inputs of the TTL gates in order to protect them from the higher output voltages of the CMOS gates.
- D. A pull-up resistor must be used between the TTL output-CMOS input node and Vcc; the value of RP will depend on the number of CMOS gates connected to the node. Discuss
- 6. For the frequency counter, which is not a control signal from the control and timing block?
Options- A. Clear
- B. Enable
- C. Reset
- D. Store Discuss
- 7. List three basic blocks in the digital clock project.
Options- A. MOD-60, MOD-12 counters
- B. MOD-5, MOD-10, MOD-12 counters
- C. MOD-60, MOD-10 counters
- D. MOD-6, MOD-12, and MOD-10 counters Discuss
- 8. In the keypad application, what does the preset state of the ring counter define?
Options- A. The proper output of the column encoder
- B. The NANDing of the rows
- C. The NANDing of the columns
- D. The proper output of the row encoder Discuss
- 9. Which is not a step that should be followed in project management?
Options- A. Overall definition
- B. System documentation
- C. Synthesis and testing
- D. System integration Discuss
- 10. What are two ways to remember the current state of a counter in VHDL?
Options- A. With FUNCTIONS and PROCESS
- B. With counters and timers
- C. With SIGNAL and VARIABLE
- D. With bit types Discuss
Digital System Projects Using HDL problems
Search Results
Correct Answer: a greater current/voltage capability than an ordinary logic circuit.
Correct Answer: Low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption
Correct Answer: It is a tristate inverter. When the ENABLE input is HIGH, the output is effectively an open circuit?it is neither LOW nor HIGH.
Correct Answer: The devices use Schottky transistors and diodes to prevent them from going into saturation; this results in faster turn on and turn off times, which translates into higher frequency operation.
Correct Answer: A pull-up resistor must be used between the TTL output-CMOS input node and Vcc; the value of RP will depend on the number of CMOS gates connected to the node.
Correct Answer: Reset
Correct Answer: MOD-6, MOD-12, and MOD-10 counters
Correct Answer: The proper output of the row encoder
Correct Answer: System documentation
Correct Answer: With SIGNAL and VARIABLE
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