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- Question
What must be done to interface TTL to CMOS?
Options- A. A dropping resistor must be used on the CMOS 12 V supply to reduce it to 5 V for the TTL.
- B. As long as the CMOS supply voltage is 5 V, they can be interfaced; however, the fan-out of the TTL is limited to five CMOS gates.
- C. A 5 V Zener diode must be placed across the inputs of the TTL gates in order to protect them from the higher output voltages of the CMOS gates.
- D. A pull-up resistor must be used between the TTL output-CMOS input node and Vcc; the value of RP will depend on the number of CMOS gates connected to the node.
- Correct Answer
- A pull-up resistor must be used between the TTL output-CMOS input node and Vcc; the value of RP will depend on the number of CMOS gates connected to the node.
- 1. A positive edge-triggered J-K flip-flop is used to produce a two-phase clock. However, when the circuit is operated it produces erratic results. Close examination with a scope reveals the presence of glitches. What causes the glitches, and how might the problem be corrected?
Options- A. The PRESET and CLEAR terminals may have been left floating; they should be properly terminated if not being used.
- B. The problem is caused by a race condition between the J and K inputs; an inverter should be inserted in one of the terminals to correct the problem.
- C. A race condition exists between the Q and Q outputs to the AND gate; the AND gate should be replaced with a NAND gate.
- D. A race condition exists between the clock and the outputs of the flip-flop feeding the AND gate; replace the flip-flop with a negative edge-triggered J-K Flip-Flop. Discuss
- 2. What type of circuit is represented in the given figure, and which statement best describes its operation?
Options- A. It is a tristate inverter. When the ENABLE input is HIGH, the output is effectively an open circuit?it is neither LOW nor HIGH.
- B. It is a programmable inverter. It can be programmed to function as either an active LOW or an active HIGH inverter.
- C. It is an active LOW buffer, which can be turned on and off by the ENABLE input.
- D. None of the above. Discuss
- 3. In a text-based language, the circuit being described must be given a name.
Options- A. True
- B. False Discuss
- 4. The representation of ?110 in eight-bit two's-complement notation is 11110111.
Options- A. True
- B. False Discuss
- 5. A ring counter is a register in which a certain pattern of 1s and 0s is continuously outputted in parallel.
Options- A. True
- B. False Discuss
- 6. Overflow can occur if two signed numbers are added and ________.
Options- A. they have opposite signs
- B. they have the same sign
- C. both of the above
- D. none of the above Discuss
- 7. How many bits are used in the data bus?
Options- A. 7
- B. 8
- C. 9
- D. 16 Discuss
- 8. On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________.
Options- A. the clock pulse is LOW
- B. the clock pulse is HIGH
- C. the clock pulse transitions from LOW to HIGH
- D. the clock pulse transitions from HIGH to LOW Discuss
- 9. The inputs/outputs of an analog multiplexer/demultiplexer are:
Options- A. bidirectional
- B. unidirectional
- C. even parity
- D. binary-coded decimal Discuss
- 10. The hexadecimal numbering system uses base 15.
Options- A. True
- B. False Discuss
More questions
Correct Answer: A race condition exists between the clock and the outputs of the flip-flop feeding the AND gate; replace the flip-flop with a negative edge-triggered J-K Flip-Flop.
Correct Answer: It is a tristate inverter. When the ENABLE input is HIGH, the output is effectively an open circuit?it is neither LOW nor HIGH.
Correct Answer: True
Correct Answer: False
Correct Answer: True
Correct Answer: they have the same sign
Correct Answer: 8
Correct Answer: the clock pulse transitions from LOW to HIGH
Correct Answer: bidirectional
Correct Answer: False
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