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  • Question

  • What must be done to interface TTL to CMOS?


  • Options
  • A. A dropping resistor must be used on the CMOS 12 V supply to reduce it to 5 V for the TTL.
  • B. As long as the CMOS supply voltage is 5 V, they can be interfaced; however, the fan-out of the TTL is limited to five CMOS gates.
  • C. A 5 V Zener diode must be placed across the inputs of the TTL gates in order to protect them from the higher output voltages of the CMOS gates.
  • D. A pull-up resistor must be used between the TTL output-CMOS input node and Vcc; the value of RP will depend on the number of CMOS gates connected to the node.

  • Correct Answer
  • A pull-up resistor must be used between the TTL output-CMOS input node and Vcc; the value of RP will depend on the number of CMOS gates connected to the node. 

    • More questions

    • 1. Output will be a LOW for any case when one or more inputs are zero for a(n):

    • Options
    • A. OR gate
    • B. NOT gate
    • C. AND gate
    • D. NOR gate
      • Discuss
    • 2. The sum of 11101 + 10111 equals ________.

    • Options
    • A. 110011
    • B. 100001
    • C. 110100
    • D. 100100
      • Discuss
    • 3. Hex is often used in digital applications as a shorthand way to represent strings of bits.

    • Options
    • A. True
    • B. False
      • Discuss
    • 4. Four cascaded modulus-10 counters have an overall modulus of ________.

    • Options
    • A. 10
    • B. 100
    • C. 1,000
    • D. 10,000
      • Discuss
    • 5. VHDL is not a new language.

    • Options
    • A. True
    • B. False
      • Discuss
    • 6. Which is not a removable drive?

    • Options
    • A. Zip
    • B. Jaz
    • C. Hard
    • D. SuperDisk
      • Discuss
    • 7. Which microprocessor has multiplexed data and address lines?

    • Options
    • A. 8086/8088
    • B. 80286
    • C. 80386
    • D. Pentium
      • Discuss
    • 8. One of the stages in a register consists of a latch.

    • Options
    • A. True
    • B. False
      • Discuss
    • 9. A VHDL component is a predefined logic function.

    • Options
    • A. True
    • B. False
      • Discuss
    • 10. L1 is known as ________.

    • Options
    • A. primary cache
    • B. secondary cache
    • C. DRAM
    • D. SRAM
      • Discuss

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