Correct Answer: A HIGH input turns Q1, Q2, and Q3 off, and Q4 is on.
9. What must be done to interface TTL to CMOS?
Options
A. A dropping resistor must be used on the CMOS 12 V supply to reduce it to 5 V for the TTL.
B. As long as the CMOS supply voltage is 5 V, they can be interfaced; however, the fan-out of the TTL is limited to five CMOS gates.
C. A 5 V Zener diode must be placed across the inputs of the TTL gates in order to protect them from the higher output voltages of the CMOS gates.
D. A pull-up resistor must be used between the TTL output-CMOS input node and Vcc; the value of RP will depend on the number of CMOS gates connected to the node.
Correct Answer: A pull-up resistor must be used between the TTL output-CMOS input node and Vcc; the value of RP will depend on the number of CMOS gates connected to the node.
10. What is unique about TTL devices such as the 74S00?
Options
A. The gate transistors are silicon (S), and the gates therefore have lower values of leakage current.
B. The S denotes the fact that a single gate is present in the IC rather than the usual package of 2?6 gates.
C. The S denotes a slow version of the device, which is a consequence of its higher power rating.
D. The devices use Schottky transistors and diodes to prevent them from going into saturation; this results in faster turn on and turn off times, which translates into higher frequency operation.
Correct Answer: The devices use Schottky transistors and diodes to prevent them from going into saturation; this results in faster turn on and turn off times, which translates into higher frequency operation.