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  • Question
  • What type of circuit is shown below and which statement best describes its operation?

    What type of circuit is shown below and which statement best describes its operation? It is a two-in


  • Options
  • A. It is a two-input CMOS AND gate with open drain.
  • B. It is a two-input CMOS buffer with tristate output.
  • C. It is a CMOS inverter with tristate output.
  • D. It is a hybrid TTL-CMOS inverter with FET totem-pole output.

  • Correct Answer
  • It is a CMOS inverter with tristate output. 


  • Integrated-Circuit Logic Families problems


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    • 1. Which of the following will not normally be found on a data sheet?

    • Options
    • A. Minimum HIGH level output voltage
    • B. Maximum LOW level output voltage
    • C. Minimum LOW level output voltage
    • D. Maximum HIGH level input current
    • Discuss
    • 2. A "floating" TTL input may be defined as:

    • Options
    • A. unused input that is tied to Vcc through a 1 k Ω resistor.
    • B. unused input that is tied to used inputs.
    • C. unused input that is tied to the ground.
    • D. unused input that is not connected.
    • Discuss
    • 3. What must be done to interface CMOS to TTL?

    • Options
    • A. A dropping resistor must be used on the CMOS 12 V supply to reduce it to 5 V for the TTL.
    • B. As long as the CMOS supply voltage is 5 V, they can be interfaced; however, the fan-out of the CMOS is limited to two TTL gates.
    • C. A 5 V Zener diode must be placed across the inputs of the TTL gates in order to protect them from the higher output voltages of the CMOS gates.
    • D. The two series cannot be interfaced without the use of special interface buffers designed for that purpose, such as the open-collector buffers.
    • Discuss
    • 4. Refer to the given figure. What type of output arrangement is being used for the output?


    • Options
    • A. Complementary-symmetry
    • B. Push-pull
    • C. Quasi push-pull
    • D. Totem-pole
    • Discuss
    • 5. The bipolar TTL logic family that was developed to increase switching speed by preventing transistor saturation is:

    • Options
    • A. emitter-coupled logic (ECL).
    • B. current-mode logic (CML).
    • C. transistor-transistor logic (TTL).
    • D. emitter-coupled logic (ECL) and transistor-transistor logic (TTL).
    • Discuss
    • 6. A logic signal experiences a delay in going through a circuit. The two propagation delay times are defined as:

    • Options
    • A. tPLH and tPHL.
    • B. tDLH and tDHL.
    • C. tHPL and tlph.
    • D. tLDH and tHDL.
    • Discuss
    • 7. What is the increase in switching speed between 74LS series TTL and 74HC/HCT (High-Speed CMOS)?

    • Options
    • A. 5
    • B. 10
    • C. 50
    • D. 100
    • Discuss
    • 8. What type of circuit is shown below, and how is the output ordinarily connected?


    • Options
    • A. It is an open-collector gate and is used to drive loads that cannot be connected directly to Vcc due to high noise levels.
    • B. It represents an active-LOW inverter and is used in negative logic systems.
    • C. It is an open-collector gate. An external load must be connected between the output terminal and an appropriate supply voltage.
    • D. Any of the above could be correct, depending on the specific application involved.
    • Discuss
    • 9. Generally, the voltage measured at an unused TTL input would typically be measured between:

    • Options
    • A. 1.4 to 1.8 V.
    • B. 0 to 5 V.
    • C. 0 to 1.8 V.
    • D. 0.8 to 5 V.
    • Discuss
    • 10. Refer the given figure. Which of the following describes the operation of the circuit?


    • Options
    • A. A LOW input turns Q1 and Q3 on; Q2 and Q4 are off.
    • B. A LOW input turns Q1 and Q4 off; Q2 and Q3 are on.
    • C. A HIGH input turns Q1, Q2, and Q3 off, and Q4 is on.
    • D. A HIGH input turns Q1, Q2, and Q4 on; Q3 is off.
    • Discuss


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