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Home Digital Electronics Integrated-Circuit Logic Families Comments

  • Question
  • The bipolar TTL logic family that was developed to increase switching speed by preventing transistor saturation is:


  • Options
  • A. emitter-coupled logic (ECL).
  • B. current-mode logic (CML).
  • C. transistor-transistor logic (TTL).
  • D. emitter-coupled logic (ECL) and transistor-transistor logic (TTL).

  • Correct Answer
  • emitter-coupled logic (ECL) and transistor-transistor logic (TTL). 


  • Integrated-Circuit Logic Families problems


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    • 1. Refer to the figure given below. What type of device is shown and what input levels are required to turn the LED off?


    • Options
    • A. The device is an open-collector AND gate and requires both inputs to be HIGH in order to turn the LED off.
    • B. The device is a Schottky AND gate and requires only one low input to turn the LED off.
    • C. The device is an open-collector AND gate and requires only one low input to turn the LED off.
    • D. The device is a Schottky open-collector AND gate and requires a low on both inputs to turn the LED off.
    • Discuss
    • 2. What are the major differences between the 5400 and 7400 series of ICs?

    • Options
    • A. The 5400 series are military grade and require tighter supply voltages and temperatures.
    • B. The 5400 series are military grade and allow for a wider range of supply voltages and temperatures.
    • C. The 7400 series are an improvement over the original 5400s.
    • D. The 7400 series was originally developed by Texas Instruments. The 5400 series was brought out by National Semiconductors after TI's patents expired, as a second supply source.
    • Discuss
    • 3. Which of the following logic families has the highest noise margin?

    • Options
    • A. TTL
    • B. LS TTL
    • C. CMOS
    • D. HCMOS
    • Discuss
    • 4. Which of the following logic families has the shortest propagation delay?

    • Options
    • A. S-TTL
    • B. AS-TTL
    • C. HS-TTL
    • D. HCMOS
    • Discuss
    • 5. What type of logic circuit is shown below and what logic function is being performed?


    • Options
    • A. It is an NMOS AND gate.
    • B. It is a CMOS AND gate.
    • C. It is a CMOS NOR gate.
    • D. It is a PMOS NAND gate.
    • Discuss
    • 6. Refer to the given figure. What type of output arrangement is being used for the output?


    • Options
    • A. Complementary-symmetry
    • B. Push-pull
    • C. Quasi push-pull
    • D. Totem-pole
    • Discuss
    • 7. What must be done to interface CMOS to TTL?

    • Options
    • A. A dropping resistor must be used on the CMOS 12 V supply to reduce it to 5 V for the TTL.
    • B. As long as the CMOS supply voltage is 5 V, they can be interfaced; however, the fan-out of the CMOS is limited to two TTL gates.
    • C. A 5 V Zener diode must be placed across the inputs of the TTL gates in order to protect them from the higher output voltages of the CMOS gates.
    • D. The two series cannot be interfaced without the use of special interface buffers designed for that purpose, such as the open-collector buffers.
    • Discuss
    • 8. A "floating" TTL input may be defined as:

    • Options
    • A. unused input that is tied to Vcc through a 1 k Ω resistor.
    • B. unused input that is tied to used inputs.
    • C. unused input that is tied to the ground.
    • D. unused input that is not connected.
    • Discuss
    • 9. Which of the following will not normally be found on a data sheet?

    • Options
    • A. Minimum HIGH level output voltage
    • B. Maximum LOW level output voltage
    • C. Minimum LOW level output voltage
    • D. Maximum HIGH level input current
    • Discuss
    • 10. What type of circuit is shown below and which statement best describes its operation?


    • Options
    • A. It is a two-input CMOS AND gate with open drain.
    • B. It is a two-input CMOS buffer with tristate output.
    • C. It is a CMOS inverter with tristate output.
    • D. It is a hybrid TTL-CMOS inverter with FET totem-pole output.
    • Discuss


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