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Home ‣ Digital Electronics ‣ Integrated-Circuit Logic Families See What Others Are Saying!
  • Question

  • What does ECL stand for?


  • Options
  • A. It stands for electron-coupled logic; all of the devices used within the gates are N-type transistors.
  • B. It stands for emitter-coupled logic; all of the inputs are coupled into the device through the emitters of the input transistors.
  • C. It stands for emitter-coupled logic; all of the emitters of the input transistors are connected together and each transistor functions as an emitter follower.
  • D. It stands for energy-coupled logic; the input energy is amplified by the input transistors and allows the device to deliver higher output currents.

  • Correct Answer
  • It stands for emitter-coupled logic; all of the emitters of the input transistors are connected together and each transistor functions as an emitter follower. 

    • More questions

    • 1. Fan-out for a typical TTL gate is ________.

    • Options
    • A. 100
    • B. 54
    • C. 10
    • D. 4
      • Discuss
    • 2. 1510 = 11112 = F16 = 00010101 BCD

    • Options
    • A. True
    • B. False
      • Discuss
    • 3. An asynchronous binary up counter, made from a series of leading edge-triggered flip-flops, can be changed to a down counter by ________.

    • Options
    • A. taking the output on the other side of the flip-flops ( instead of Q)
    • B. clocking of each succeeding flip-flop from the other side ( instead of Q)
    • C. changing the flip-flops to trailing edge triggering
    • D. all of the above
      • Discuss
    • 4. The 1's complement of 10011101 is ________.

    • Options
    • A. 01100010
    • B. 10011110
    • C. 01100001
    • D. 01100011
      • Discuss
    • 5. VHDL code is divided into three sections: library declaration, entity declaration, and architecture body.

    • Options
    • A. True
    • B. False
      • Discuss
    • 6. If an input is activated by a signal transition, it is ________.

    • Options
    • A. hair-triggered
    • B. line-triggered
    • C. pulse-triggered
    • D. edge-triggered
      • Discuss
    • 7. In the digital clock project, when it is 11:59:59, AND gate 1 detects that the tens of hours is 1 and the edge trigger clock moves the display to 12:00:00.

    • Options
    • A. True
    • B. False
      • Discuss
    • 8. Manufacturers of computers utilize 3-bit codes to indicate operations or instructions.

    • Options
    • A. True
    • B. False
      • Discuss
    • 9. When an open occurs on the input of a CMOS gate, the output will ________.

    • Options
    • A. go LOW, because there is no current in an open circuit
    • B. react as if the open input were a HIGH
    • C. go HIGH, since full voltage appears across an open
    • D. be unpredictable; it may go HIGH or LOW
      • Discuss
    • 10. The inverter can be produced with how many NAND gates?

    • Options
    • A. 1
    • B. 2
    • C. 3
    • D. 4
      • Discuss

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