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  • Question

  • Why is the fan-out of CMOS gates frequency dependent?


  • Options
  • A. Each CMOS input gate has a specific propagation time and this limits the number of different gates that can be connected to the output of a CMOS gate.
  • B. When the frequency reaches the critical value, the gate will only be capable of delivering 70% of the normal output voltage and consequently the output power will be one-half of normal; this defines the upper operating frequency.
  • C. The higher the number of gates attached to the output, the more frequently they will have to be serviced, thus reducing the frequency at which each will be serviced with an input signal.
  • D. The input gates of the FETs are predominantly capacitive, and as the signal frequency increases the capacitive loading also increases, thereby limiting the number of loads that may be attached to the output of the driving gate.

  • Correct Answer
  • The input gates of the FETs are predominantly capacitive, and as the signal frequency increases the capacitive loading also increases, thereby limiting the number of loads that may be attached to the output of the driving gate. 

    • More questions

    • 1. PALs tend to execute ________ logic.

    • Options
    • A. SAP
    • B. SOP
    • C. PLA
    • D. SPD
      • Discuss
    • 2. 34FC + AD31 = ________.

    • Options
    • A. E22D
    • B. E31D
    • C. E21D
    • D. E42D
      • Discuss
    • 3. A decimal 11 in BCD is ________.

    • Options
    • A. 00001011
    • B. 00001100
    • C. 00010001
    • D. 00010010
      • Discuss
    • 4. Convert the following BCD number to decimal.
      010101101001bcd

    • Options
    • A. 539
    • B. 2551
    • C. 569
    • D. 1552
      • Discuss
    • 5. Parallel transmission is faster than serial.

    • Options
    • A. True
    • B. False
      • Discuss
    • 6. The complement of 1 is 0.

    • Options
    • A. True
    • B. False
      • Discuss
    • 7. Digital signal processing must be at least half as fast as the incoming signal to be processed.

    • Options
    • A. True
    • B. False
      • Discuss
    • 8. In the keypad HDL encoder, NANDing of the columns is used to activate the freeze bit.

    • Options
    • A. True
    • B. False
      • Discuss
    • 9. Resolution in the analog output of a DAC is primarily dependent on the number of input binary bits.

    • Options
    • A. True
    • B. False
      • Discuss
    • 10. The carry-out of a binary adder is identified using the summation symbol, sigma.

    • Options
    • A. True
    • B. False
      • Discuss

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