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- Question
How many 74LSTTL logic gates can be driven from a 74TTL gate?
Options- A. 10
- B. 20
- C. 200
- D. 400
- Correct Answer
- 20
- 1. What is the standard TTL noise margin?
Options- A. 5.0 V
- B. 0.0 V
- C. 0.8 V
- D. 0.4 V Discuss
- 2. What is the range of invalid TTL output voltage?
Options- A. 0.0?0.4 V
- B. 0.4?2.4 V
- C. 2.4?5.0 V
- D. 0.0?5.0 V Discuss
- 3. A TTL totem-pole circuit is designed so that the output transistors:
Options- A. are always on together
- B. provide linear phase splitting
- C. provide voltage regulation
- D. are never on together Discuss
- 4. Totem-pole outputs ________ be connected ________ because ________.
Options- A. can, in parallel, sometimes higher current is required
- B. cannot, together, if the outputs are in opposite states excessively high currents can damage one or both devices
- C. should, in series, certain applications may require higher output voltage
- D. can, together, together they can handle larger load currents and higher output voltages Discuss
- 5. Why must CMOS devices be handled with care?
Options- A. so they don't get dirty
- B. because they break easily
- C. because they can be damaged by static electricity discharge Discuss
- 6. What should be done with unused inputs to a TTL NAND gate?
Options- A. let them float
- B. tie them LOW
- C. tie them HIGH Discuss
- 7. What is the difference between the 74HC00 series and the 74HCT00 series of CMOS logic?
Options- A. The HCT series is faster.
- B. The HCT series is slower.
- C. The HCT series is input and output voltage compatible with TTL.
- D. The HCT series is not input and output voltage compatible with TTL. Discuss
- 8. The word "interfacing" as applied to digital electronics usually means:
Options- A. a conditioning circuit connected between a standard TTL NAND gate and a standard TTL OR gate
- B. a circuit connected between the driver and load to condition a signal so that it is compatible with the load
- C. any gate that is a TTL operational amplifier designed to condition signals between NMOS transistors
- D. any TTL circuit that is an input buffer stage Discuss
- 9. The problem of different current requirements when CMOS logic circuits are driving TTL logic circuits can usually be overcome by the addition of:
Options- A. a CMOS inverting bilateral switch between the stages
- B. a TTL tristate inverting buffer between the stages
- C. a CMOS noninverting bilateral switch between the stages
- D. a CMOS buffer or inverting buffer Discuss
- 10. What is the major advantage of ECL logic?
Options- A. very high speed
- B. wide range of operating voltage
- C. very low cost
- D. very high power Discuss
Logic Families and Their Characteristics problems
Search Results
Correct Answer: 0.4 V
Correct Answer: 0.4?2.4 V
Correct Answer: are never on together
Correct Answer: cannot, together, if the outputs are in opposite states excessively high currents can damage one or both devices
Correct Answer: because they can be damaged by static electricity discharge
Correct Answer: tie them HIGH
Correct Answer: The HCT series is input and output voltage compatible with TTL.
Correct Answer: a circuit connected between the driver and load to condition a signal so that it is compatible with the load
Correct Answer: a CMOS buffer or inverting buffer
Correct Answer: very high speed
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