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- Question
What is the range of invalid TTL output voltage?
Options- A. 0.0?0.4 V
- B. 0.4?2.4 V
- C. 2.4?5.0 V
- D. 0.0?5.0 V
- Correct Answer
- 0.4?2.4 V
- 1. A TTL totem-pole circuit is designed so that the output transistors:
Options- A. are always on together
- B. provide linear phase splitting
- C. provide voltage regulation
- D. are never on together Discuss
- 2. Totem-pole outputs ________ be connected ________ because ________.
Options- A. can, in parallel, sometimes higher current is required
- B. cannot, together, if the outputs are in opposite states excessively high currents can damage one or both devices
- C. should, in series, certain applications may require higher output voltage
- D. can, together, together they can handle larger load currents and higher output voltages Discuss
- 3. Why must CMOS devices be handled with care?
Options- A. so they don't get dirty
- B. because they break easily
- C. because they can be damaged by static electricity discharge Discuss
- 4. What is unique about TTL devices such as the 74SXX?
Options- A. These devices use Schottky transistors and diodes to prevent them from going into saturation; this results in faster turn-on and turn-off times, which translates into higher frequency operation.
- B. The gate transistors are silicon (S), and the gates therefore have lower values of leakage current.
- C. The S denotes the fact that a single gate is present in the IC rather than the usual package of 2?6 gates.
- D. The S denotes a slow version of the device, which is a consequence of its higher power rating. Discuss
- 5. From the following specifications determine the fan-out for the logic family.
Options- A. HIGH state is 16, LOW state is 8
- B. HIGH state is 8, LOW state is 16
- C. HIGH state is 4, LOW state is 8
- D. HIGH state is 8, LOW state is 4 Discuss
- 6. What is the standard TTL noise margin?
Options- A. 5.0 V
- B. 0.0 V
- C. 0.8 V
- D. 0.4 V Discuss
- 7. How many 74LSTTL logic gates can be driven from a 74TTL gate?
Options- A. 10
- B. 20
- C. 200
- D. 400 Discuss
- 8. What should be done with unused inputs to a TTL NAND gate?
Options- A. let them float
- B. tie them LOW
- C. tie them HIGH Discuss
- 9. What is the difference between the 74HC00 series and the 74HCT00 series of CMOS logic?
Options- A. The HCT series is faster.
- B. The HCT series is slower.
- C. The HCT series is input and output voltage compatible with TTL.
- D. The HCT series is not input and output voltage compatible with TTL. Discuss
- 10. The word "interfacing" as applied to digital electronics usually means:
Options- A. a conditioning circuit connected between a standard TTL NAND gate and a standard TTL OR gate
- B. a circuit connected between the driver and load to condition a signal so that it is compatible with the load
- C. any gate that is a TTL operational amplifier designed to condition signals between NMOS transistors
- D. any TTL circuit that is an input buffer stage Discuss
Logic Families and Their Characteristics problems
Search Results
Correct Answer: are never on together
Correct Answer: cannot, together, if the outputs are in opposite states excessively high currents can damage one or both devices
Correct Answer: because they can be damaged by static electricity discharge
Correct Answer: These devices use Schottky transistors and diodes to prevent them from going into saturation; this results in faster turn-on and turn-off times, which translates into higher frequency operation.
Correct Answer: HIGH state is 8, LOW state is 16
Correct Answer: 0.4 V
Correct Answer: 20
Correct Answer: tie them HIGH
Correct Answer: The HCT series is input and output voltage compatible with TTL.
Correct Answer: a circuit connected between the driver and load to condition a signal so that it is compatible with the load
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