Which of the following summarizes the important features of emitter-coupled logi

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Question
Which of the following summarizes the important features of emitter-coupled logic (ECL)?
Options
A. low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption
B. good noise immunity, negative logic, high-frequency capability, low power dissipation, and short propagation time
C. low propagation time, high-frequency response, low power consumption, and high output voltage swings
D. poor noise immunity, positive supply voltage operation, good low-frequency operation, and low power

Correct Answer

low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption

2. The problem of the V_OH(min) of a TTL IC being too low to drive a CMOS circuit and meet the CMOS requirement of V_IH(min) is usually easily overcome by:
Options
A. adding a fixed voltage-divider bias resistive network at the output of the TTL device
B. avoiding this condition and only using TTL to drive TTL
C. adding an external pull-down resistor to ground
D. adding an external pull-up resistor to V_CC

3. PMOS and NMOS ________.
Options
A. represent MOSFET devices utilizing either P-channel or N-channel devices exclusively within a given gate
B. are enhancement-type CMOS devices used to produce a series of high-speed logic known as 74HC
C. represent positive and negative MOS-type devices, which can be operated from differential power supplies and are compatible with operational amplifiers
D. None of the above

5. Why is the operating frequency for CMOS devices critical for determining power dissipation?
Options
A. At low frequencies, power dissipation increases.
B. At high frequencies, the gate will only be able to deliver 70.7 % of rated power.
C. At high frequencies, charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.
D. At high frequencies, the gate will only be able to deliver 70.7 % of rated power and charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.

6. Why is a decoupling capacitor needed for TTL ICs and where should it be connected?
Options
A. to block dc, connect to input pins
B. to reduce noise, connect to input pins
C. to reduce the effects of noise, connect between power supply and ground

10. The rise time (t_r) is the time it takes for a pulse to rise from its ________ point up to its ________ point. The fall time (t_f) is the length of time it takes to fall from the ________ to the ________ point.
Options
A. 10%, 90%, 90%, 10%
B. 90%, 10%, 10%, 90%
C. 20%, 80%, 80%, 20%
D. 10%, 70.7%, 70.7%, 10%

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