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Home Digital Electronics Programmable Logic Device Comments

  • Question
  • The complex programmable logic device (CPLD) contains several PAL-type simple programmable logic devices (SPLDs) called:


  • Options
  • A. macrocells
  • B. microcells
  • C. AND/OR arrays
  • D. fuse-link arrays

  • Correct Answer
  • macrocells 


  • Programmable Logic Device problems


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    • 1. Each programmable array logic (PAL) gate product is applied to an OR gate and, if combinational logic is desired, the product is ORed and then:

    • Options
    • A. the polarity fuse is restored
    • B. sent to an inverter for output
    • C. sent immediately to an output pin
    • D. passed to the AND function for output
    • Discuss
    • 2. What is the defining difference between microprocessor/DSP systems and other digital systems?

    • Options
    • A. The digital system follows a programmed sequence of instructions that the designer specified.
    • B. The microprocessor follows a programmed sequence of instructions that the designer specified.
    • C. The digital system is faster.
    • D. The microprocessor/DSP is faster.
    • Discuss
    • 3. Which of the following testing procedures uses the JTAG IEEE standard?

    • Options
    • A. Bed-of-nails
    • B. Flying probe
    • C. EXTEST
    • D. Boundary scan
    • Discuss
    • 4. The Altera MAX 7000 series ________.

    • Options
    • A. uses an E2PROM process technology
    • B. can have between 2 and 16 LABS and I/O control blocks
    • C. is available with DC supply voltages between 2.5 V and 5 V
    • D. all of the above
    • Discuss
    • 5. Now many times can a GAL be erased and reprogrammed?

    • Options
    • A. 0
    • B. At least 100
    • C. At least 1000
    • D. Over 10,000
    • Discuss
    • 6. Which is a mode of operation of the GAL16V8?

    • Options
    • A. Simple mode
    • B. Complex mode
    • C. Registered mode
    • D. All of the above
    • Discuss
    • 7. The problem of interfacing IC logic families that have different supply voltages (VCC's) can be solved by using a:

    • Options
    • A. level-shifter
    • B. tristate shifter
    • C. decoupling capacitor
    • D. pull-down resistor
    • Discuss
    • 8. Why is the operating frequency for CMOS devices critical for determining power dissipation?

    • Options
    • A. At low frequencies, power dissipation increases.
    • B. At high frequencies, the gate will only be able to deliver 70.7 % of rated power.
    • C. At high frequencies, charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.
    • D. At high frequencies, the gate will only be able to deliver 70.7 % of rated power and charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.
    • Discuss
    • 9. Which of the following logic families has the shortest propagation delay?

    • Options
    • A. CMOS
    • B. BiCMOS
    • C. ECL
    • D. 74SXX
    • Discuss
    • 10. PMOS and NMOS ________.

    • Options
    • A. represent MOSFET devices utilizing either P-channel or N-channel devices exclusively within a given gate
    • B. are enhancement-type CMOS devices used to produce a series of high-speed logic known as 74HC
    • C. represent positive and negative MOS-type devices, which can be operated from differential power supplies and are compatible with operational amplifiers
    • D. None of the above
    • Discuss


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