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- Question
A BCD counter is a ________.
Options- A. binary counter
- B. full-modulus counter
- C. decade counter
- D. divide-by-10 counter
- Correct Answer
- decade counter
- 1. Synchronous construction reduces the delay time of a counter to the delay of:
Options- A. all flip-flops and gates
- B. all flip-flops and gates after a 3 count
- C. a single gate
- D. a single flip-flop and a gate Discuss
- 2. How many different states does a 2-bit asynchronous counter have?
Options- A. 1
- B. 2
- C. 4
- D. 8 Discuss
- 3. A 4-bit up/down binary counter is in the DOWN mode and in the 1100 state. To what state does the counter go on the next clock pulse?
Options- A. 1101
- B. 1011
- C. 1111
- D. 0000 Discuss
- 4. What is meant by parallel load of a counter?
Options- A. Each FF is loaded with data on a separate clock.
- B. The counter is cleared.
- C. All FFs are preset with data. Discuss
- 5. A 12 MHz clock frequency is applied to a cascaded counter containing a modulus-5 counter, a modulus-8 counter, and a modulus-10 counter. The lowest output frequency possible is ________.
Options- A. 10 kHz
- B. 20 kHz
- C. 30 kHz
- D. 60 kHz Discuss
- 6. How many natural states will there be in a 4-bit ripple counter?
Options- A. 4
- B. 8
- C. 16
- D. 32 Discuss
- 7. What is the difference between a 7490 and a 7493?
Options- A. 7490 is a MOD-10, 7493 is a MOD-16
- B. 7490 is a MOD-16, 7493 is a MOD-10
- C. 7490 is a MOD-12, 7493 is a MOD-16
- D. 7490 is a MOD-10, 7493 is a MOD-12 Discuss
- 8. Which of the following statements best describes the operation of a synchronous up-/down-counter?
Options- A. The counter can count in either direction, but must continue in that direction once started.
- B. The counter can be reversed, but must be reset before counting in the other direction.
- C. In general, the counter can be reversed at any point in its counting sequence.
- D. The count sequence cannot be reversed, once it has begun, without first resetting the counter to zero. Discuss
- 9. Which of the following is an invalid output state for an 8421 BCD counter?
Options- A. 1110
- B. 0000
- C. 0010
- D. 0001 Discuss
- 10. How can a digital one-shot be implemented using HDL?
Options- A. By using a resistor and a capacitor
- B. By applying the concept of a counter
- C. By using a library function
- D. By applying a level trigger Discuss
Counters problems
Search Results
Correct Answer: a single flip-flop and a gate
Correct Answer: 4
Correct Answer: 1011
Correct Answer: All FFs are preset with data.
Correct Answer: 30 kHz
Correct Answer: 16
Correct Answer: 7490 is a MOD-10, 7493 is a MOD-16
Correct Answer: In general, the counter can be reversed at any point in its counting sequence.
Correct Answer: 1110
Correct Answer: By applying the concept of a counter
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