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- Question
What function does the CTR DIV 8 circuit given below perform?
Options- A. It divides the clock frequency down to match the frequency of the serial data in.
- B. The divide-by-8 counter is triggered by the control flip-flop and clock, which then allows the data output register to begin storing the input data. Once all eight data bits are stored in the data output register, the data output register and the divide-by-8 counter trigger the one-shot. The one-shot then begins the process all over again.
- C. The divide-by-8 counter is used to verify that the parity bit is attached to the input data string.
- D. It keeps track of the eight data bits, triggering the transfer of the data through the output register and the one-shot, which then resets the control flip-flop and divide-by-8 counter.
- Correct Answer
- It keeps track of the eight data bits, triggering the transfer of the data through the output register and the one-shot, which then resets the control flip-flop and divide-by-8 counter.
- 1. A positive edge-triggered J-K flip-flop is used to produce a two-phase clock. However, when the circuit is operated it produces erratic results. Close examination with a scope reveals the presence of glitches. What causes the glitches, and how might the problem be corrected?
Options- A. The PRESET and CLEAR terminals may have been left floating; they should be properly terminated if not being used.
- B. The problem is caused by a race condition between the J and K inputs; an inverter should be inserted in one of the terminals to correct the problem.
- C. A race condition exists between the Q and Q outputs to the AND gate; the AND gate should be replaced with a NAND gate.
- D. A race condition exists between the clock and the outputs of the flip-flop feeding the AND gate; replace the flip-flop with a negative edge-triggered J-K Flip-Flop. Discuss
- 2. What type of circuit is represented in the given figure, and which statement best describes its operation?
Options- A. It is a tristate inverter. When the ENABLE input is HIGH, the output is effectively an open circuit?it is neither LOW nor HIGH.
- B. It is a programmable inverter. It can be programmed to function as either an active LOW or an active HIGH inverter.
- C. It is an active LOW buffer, which can be turned on and off by the ENABLE input.
- D. None of the above. Discuss
- 3. In a text-based language, the circuit being described must be given a name.
Options- A. True
- B. False Discuss
- 4. The representation of ?110 in eight-bit two's-complement notation is 11110111.
Options- A. True
- B. False Discuss
- 5. A ring counter is a register in which a certain pattern of 1s and 0s is continuously outputted in parallel.
Options- A. True
- B. False Discuss
- 6. Overflow can occur if two signed numbers are added and ________.
Options- A. they have opposite signs
- B. they have the same sign
- C. both of the above
- D. none of the above Discuss
- 7. How many bits are used in the data bus?
Options- A. 7
- B. 8
- C. 9
- D. 16 Discuss
- 8. On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________.
Options- A. the clock pulse is LOW
- B. the clock pulse is HIGH
- C. the clock pulse transitions from LOW to HIGH
- D. the clock pulse transitions from HIGH to LOW Discuss
- 9. The inputs/outputs of an analog multiplexer/demultiplexer are:
Options- A. bidirectional
- B. unidirectional
- C. even parity
- D. binary-coded decimal Discuss
- 10. The hexadecimal numbering system uses base 15.
Options- A. True
- B. False Discuss
More questions
Correct Answer: A race condition exists between the clock and the outputs of the flip-flop feeding the AND gate; replace the flip-flop with a negative edge-triggered J-K Flip-Flop.
Correct Answer: It is a tristate inverter. When the ENABLE input is HIGH, the output is effectively an open circuit?it is neither LOW nor HIGH.
Correct Answer: True
Correct Answer: False
Correct Answer: True
Correct Answer: they have the same sign
Correct Answer: 8
Correct Answer: the clock pulse transitions from LOW to HIGH
Correct Answer: bidirectional
Correct Answer: False
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