Discussion
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- Question
Which of the following is an invalid state in an 8421 BCD counter?
Options- A. 0011
- B. 1001
- C. 1000
- D. 1100
- Correct Answer
- 1100
- 1. Integrated-circuit counter chips are used in numerous applications including:
Options- A. timing operations, counting operations, sequencing, and frequency multiplication
- B. timing operations, counting operations, sequencing, and frequency division
- C. timing operations, decoding operations, sequencing, and frequency multiplication
- D. data generation, counting operations, sequencing, and frequency multiplication Discuss
- 2. A 5-bit asynchronous binary counter is made up of five flip-flops, each with a 12 ns propagation delay. The total propagation delay (tp(tot)) is ________.
Options- A. 12 ms
- B. 24 ns
- C. 48 ns
- D. 60 ns Discuss
- 3. List which pins need to be connected together on a 7493 to make a MOD-12 counter.
Options- A. 12 to 1, 11 to 3, 9 to 2
- B. 12 to 1, 11 to 3, 12 to 2
- C. 12 to 1, 11 to 3, 8 to 2
- D. 12 to 1, 11 to 3, 1 to 2 Discuss
- 4. In an HDL ring counter, many invalid states are included in the programming by:
Options- A. using a case statement.
- B. using an elsif statement.
- C. including them under others.
- D. the ser_in line. Discuss
- 5. Synchronous counters eliminate the delay problems encountered with asynchronous counters because the:
Options- A. input clock pulses are applied only to the first and last stages
- B. input clock pulses are applied only to the last stage
- C. input clock pulses are not used to activate any of the counter stages
- D. input clock pulses are applied simultaneously to each stage Discuss
- 6. A counter with a modulus of 16 acts as a ________.
Options- A. divide-by-8 counter
- B. divide-by-16 counter
- C. divide-by-32 counter
- D. divide-by-64 counter Discuss
- 7. Four cascaded modulus-10 counters have an overall modulus of ________.
Options- A. 10
- B. 100
- C. 1,000
- D. 10,000 Discuss
- 8. Using four cascaded counters with a total of 16 bits, how many states must be deleted to achieve a modulus of 50,000?
Options- A. 50,000
- B. 65,536
- C. 25,536
- D. 15,536 Discuss
- 9. What type of device is shown below?
Options- A. 4-bit bidirectional universal shift register
- B. Parallel in/parallel out shift register with bidirectional data flow
- C. 2-way parallel in/serial out bidirectional register
- D. 2-bit serial in/4-bit parallel out bidirectional shift register Discuss
- 10. After 10 clock cycles, and assuming that the DATA input had returned to 0 following the storage sequence, what values would be stored in Q4, Q3, Q2, Q1, Q0 of the register in Figure 7-5?
Options- A. 0,1,0,1,1
- B. 1,1,0,1,0
- C. 1,0,1,0,1
- D. 0,0,0,0,0 Discuss
Counters problems
Search Results
Correct Answer: timing operations, counting operations, sequencing, and frequency division
Correct Answer: 60 ns
Correct Answer: 12 to 1, 11 to 3, 8 to 2
Correct Answer: including them under others.
Correct Answer: input clock pulses are applied simultaneously to each stage
Correct Answer: divide-by-16 counter
Correct Answer: 10,000
Correct Answer: 15,536
Correct Answer: 4-bit bidirectional universal shift register
Correct Answer: 0,0,0,0,0
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