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Digital Electronics
‣
Flip-Flops
Comments
Question
One example of the use of an
S-R
flip-flop is as a(n):
Options
A. racer
B. astable oscillator
C. binary storage register
D. transition pulse generator
Correct Answer
binary storage register
Flip-Flops problems
Search Results
1. In VHDL, how many inputs will a primitive JK flip-flop have?
Options
A. 2
B. 3
C. 4
D. 5
Show Answer
Scratch Pad
Discuss
Correct Answer: 5
2. The circuit that is primarily responsible for certain flip-flops to be designated as edge-triggered is the:
Options
A. edge-detection circuit.
B. NOR latch.
C. NAND latch.
D. pulse-steering circuit.
Show Answer
Scratch Pad
Discuss
Correct Answer: edge-detection circuit.
3. Asynchronous inputs will cause the flip-flop to respond immediately with regard to the clock input.
Options
A. True
B. False
Show Answer
Scratch Pad
Discuss
Correct Answer: False
4. In VHDL, in which declaration section is a COMPONENT declared?
Options
A. Architecture
B. Library
C. Entity
D. Port map
Show Answer
Scratch Pad
Discuss
Correct Answer: Architecture
5. When is a flip-flop said to be transparent?
Options
A. when the
Q
output is opposite the input
B. when the
Q
output follows the input
C. when you can see through the IC packaging
Show Answer
Scratch Pad
Discuss
Correct Answer: when the
Q
output follows the input
6. Determine the output frequency for a frequency division circuit that contains 12 flip-flops with an input clock frequency of 20.48 MHz.
Options
A. 10.24 kHz
B. 5 kHz
C. 30.24 kHz
D. 15 kHz
Show Answer
Scratch Pad
Discuss
Correct Answer: 5 kHz
7. If an input is activated by a signal transition, it is ________.
Options
A. edge-triggered
B. toggle triggered
C. clock triggered
D. noise triggered
Show Answer
Scratch Pad
Discuss
Correct Answer: edge-triggered
8. Which of the following is correct for a gated
D
flip-flop?
Options
A. The output toggles if one of the inputs is held HIGH.
B. Only one of the inputs can be HIGH at a time.
C. The output complement follows the input when enabled.
D.
Q
output follows the input
D
when the enable is HIGH.
Show Answer
Scratch Pad
Discuss
Correct Answer:
Q
output follows the input
D
when the enable is HIGH.
9. What is one disadvantage of an
S-R
flip-flop?
Options
A. It has no enable input.
B. It has an invalid state.
C. It has no clock input.
D. It has only a single output.
Show Answer
Scratch Pad
Discuss
Correct Answer: It has an invalid state.
10. A push-button switch is used to input data to a register. The output of the register is erratic. What could be causing the problem?
Options
A. The power supply is probably noisy.
B. The switch contacts are bouncing.
C. The socket contacts on the register IC are corroded.
D. The register IC is intermittent and failure is imminent.
Show Answer
Scratch Pad
Discuss
Correct Answer: The switch contacts are bouncing.
Comments
Impagegal
Few days of specifics, but cats have antibodies, as an injured area
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More in Digital Electronics:
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Flip-Flops
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Few days of specifics, but cats have antibodies, as an injured area