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Home Digital Electronics Flip-Flops Comments

  • Question
  • Which of the following is not generally associated with flip-flops?


  • Options
  • A. Hold time
  • B. Propagation delay time
  • C. Interval time
  • D. Set up time

  • Correct Answer
  • Interval time 


  • Flip-Flops problems


    Search Results


    • 1. If both inputs of an S-R flip-flop are LOW, what will happen when the clock goes high?

    • Options
    • A. No change will occur in the output.
    • B. An invalid state will exist.
    • C. The output will toggle.
    • D. The output will reset.
    • Discuss
    • 2. Two J-K flip-flops with their J-K inputs tied HIGH are cascaded to be used as counters. After four input clock pulses, the binary count is ________.

    • Options
    • A. 00
    • B. 11
    • C. 01
    • D. 10
    • Discuss
    • 3. A 555 operating as a monostable multivibrator has an R1 of 1 MΩ. Determine C1 for a pulse width of 2 s.

    • Options
    • A. 1.8 µF
    • B. 18 F
    • C. 18 pF
    • D. 18 nF
    • Discuss
    • 4. A gated S-R latch and its associated waveforms are shown below. What, if anything, is wrong and what could be causing the problem?


    • Options
    • A. The output is always low; the circuit is defective.
    • B. The Q output should be the complement of the output; the S and R terminals are reversed.
    • C. The Q should be following the R input; the R input is defective.
    • D. There is nothing wrong with the circuit.
    • Discuss
    • 5. Which is not a real advantage of HDL?

    • Options
    • A. Using higher levels of abstraction
    • B. Tailoring components to exactly fit the needs of the project
    • C. The use of graphical tools
    • D. Using higher levels of abstraction and tailoring components to exactly fit the needs of the project
    • Discuss
    • 6. Edge-triggered flip-flops must have:

    • Options
    • A. very fast response times
    • B. at least two inputs to handle rising and falling edges
    • C. positive edge-detection circuits
    • D. negative edge-detection circuits
    • Discuss
    • 7. A D flip-flop utilizing a PGT clock is in the CLEAR state. Which of the following input actions will cause it to change states?

    • Options
    • A. CLK = NGT, D = 0
    • B. CLK = PGT, D = 0
    • C. CLOCK NGT, D = 1
    • D. CLOCK PGT, D = 1
    • E. CLK = NGT, D = 0, CLOCK NGT, D = 1
    • Discuss
    • 8. An active-HIGH input S-R latch has a 1 on the S input and a 0 on the R input. What state is the latch in?

    • Options
    • A.
    • B.
    • C.
    • D.
    • Discuss
    • 9. The pulse width of a one-shot circuit is determined by ________.

    • Options
    • A. a resistor and capacitor
    • B. two resistors
    • C. two capacitors
    • D. none of the above
    • Discuss
    • 10. Which of the following is correct for a D latch?

    • Options
    • A. The output toggles if one of the inputs is held HIGH.
    • B. Q output follows the input D when the enable is HIGH.
    • C. Only one of the inputs can be HIGH at a time.
    • D. The output complement follows the input when enabled.
    • Discuss


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