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Home Digital Electronics Flip-Flops See What Others Are Saying!
  • Question
  • If both inputs of an S-R flip-flop are low, what will happen when the clock goes HIGH?


  • Options
  • A. An invalid state will exist.
  • B. No change will occur in the output.
  • C. The output will toggle.
  • D. The output will reset.

  • Correct Answer
  • No change will occur in the output. 


  • More questions

    • 1. On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________.

    • Options
    • A. the clock pulse is LOW
    • B. the clock pulse is HIGH
    • C. the clock pulse transitions from LOW to HIGH
    • D. the clock pulse transitions from HIGH to LOW
    • Discuss
    • 2. The inputs/outputs of an analog multiplexer/demultiplexer are:

    • Options
    • A. bidirectional
    • B. unidirectional
    • C. even parity
    • D. binary-coded decimal
    • Discuss
    • 3. The hexadecimal numbering system uses base 15.

    • Options
    • A. True
    • B. False
    • Discuss
    • 4. The output voltage or current of a digital-to-analog converter is truly an analog signal.

    • Options
    • A. True
    • B. False
    • Discuss
    • 5. Shift registers are used to store and transfer data.

    • Options
    • A. True
    • B. False
    • Discuss
    • 6. To reduce the number of pins on high-capacity DRAM chips, address ________ is used so that a single pin can accommodate two different address bits.

    • Options
    • A. conversion
    • B. programming
    • C. multiplexing
    • D. firmware
    • Discuss
    • 7. The ________ number system has a base of sixteen.

    • Options
    • A. Johnson
    • B. hexadecimal
    • C. binary
    • D. octal
    • Discuss
    • 8. Using the CPLD design environment, we can simulate any combinations of inputs and observe the resulting output to check for proper circuit operation.

    • Options
    • A. True
    • B. False
    • Discuss
    • 9. In a parity generator circuit, an error is signaled on an error indicator.

    • Options
    • A. True
    • B. False
    • Discuss
    • 10. The gated S-R flip-flop is asynchronous.

    • Options
    • A. True
    • B. False
    • Discuss


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