Discussion
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- Question
Bit-addressable memory locations are:
Options- A. 10H through 1FH
- B. 20H through 2FH
- C. 30H through 3FH
- D. 40H through 4FH
- Correct Answer
- 20H through 2FH
- 1. The special function registers can be referred to by their hex addresses or by their register names.
Options- A. True
- B. False Discuss
- 2. Which of the following commands will move the number 27H into the accumulator?
Options- A. MOV A, P27
- B. MOV A, #27H
- C. MOV A, 27H
- D. MOV A, @27 Discuss
- 3. The 8051 has ________ parallel I/O ports.
Options- A. 2
- B. 3
- C. 4
- D. 5 Discuss
- 4. To interface external EPROM memory for applications, it is necessary to demultiplex the address/data lines of the 8051.
Options- A. True
- B. False Discuss
- 5. The I/O ports that are used as address and data for external memory are:
Options- A. ports 1 and 2
- B. ports 1 and 3
- C. ports 0 and 2
- D. ports 0 and 3 Discuss
- 6. The designs of a centigrade thermometer and a PWM speed-control circuit can be implemented by the 8051.
Options- A. True
- B. False Discuss
- 7. Device pins XTAL1 and XTAL2 for the 8051 are used for connections to an external oscillator or crystal.
Options- A. True
- B. False Discuss
- 8. This statement will set the address of the bit to 1 (8051 Micro-controller):
SETB 01H
Options- A. True
- B. False Discuss
- 9. This program code will read data from port 0 and write it to port 2, and it will stop looping when bit 3 of port 2 is set:
STAT: MOV A, PO MOV P2,A JNB P2.3, STAT
Options- A. True
- B. False Discuss
- 10. The 8051 can handle ________ interrupt sources.
Options- A. 3
- B. 4
- C. 5
- D. 6 Discuss
The 8051 Microcontroller problems
Search Results
Correct Answer: True
Correct Answer: MOV A, #27H
Correct Answer: 4
Correct Answer: True
Correct Answer: ports 0 and 2
Correct Answer: True
Correct Answer: True
Correct Answer: False
Correct Answer: True
Correct Answer: 5
Explanation:
There are five interrupt sources for the 8051, which means that they can recognize 5 different events that can interrupt regular program execution. Each interrupt can be enabled or disabled by setting bits of the IE register. Likewise, the whole interrupt system can be disabled by clearing the EA bit of the same register.
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