Discussion
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- Question
When the inputs to a flip-flop are changing at the same time that the active trigger edge of the input clock is making its transition, this condition is called:
Options- A. racing
- B. toggling
- C. slave loading
- D. pulse timing
- Correct Answer
- racing
- 1. One example for the use of a Schmitt trigger is as a(n):
Options- A. switch debouncer
- B. racer
- C. astable oscillator
- D. transition pulse generator Discuss
- 2. The output of a standard TTL NAND gate is used to pull an LED indicator LOW. The LED is in series with a 470-Ω resistor. What is the current in the circuit when the LED is on?
Options- A. 7.02 mA
- B. 8.51 mA
- C. 10.63 mA
- D. 5.32 mA Discuss
- 3. The ________ circuit overcomes the problem of switching caused by jitter on the inputs.
Options- A. astable multivibrator
- B. monostable multivibrator
- C. bistable multivibrator
- D. Schmitt trigger Discuss
- 4. What is the major advantage of the J-K flip-flop over the S-R flip-flop?
Options- A. The J-K flip-flop is much faster.
- B. The J-K flip-flop does not have propagation delay problems.
- C. The J-K flip-flop has a toggle state.
- D. The J-K flip-flop has two outputs. Discuss
- 5. The main concern when using a pull-down resistor is:
Options- A. the low power dissipation of the resistor
- B. it will keep a floating terminal LOW
- C. the high power dissipation of the resistor
- D. it will cause false triggering Discuss
- 6. If Vcc of a 555 timer circuit is set to +10 V what is the level of output voltage from the circuit?
Options- A. VOH = 10 V, VOL = 0 V
- B. VOH = 10 V, VOL = 0.1 V
- C. VOH = 8.5 V, VOL = 0 V
- D. VOH = 8.5 V, VOL = 0.1 V Discuss
- 7. In a typical IC monostable multivibrator circuit, at the falling edge of the trigger input, the output switches HIGH for a period of time determined by the ________.
Options- A. value of the RC timing components
- B. amplitude of the input trigger
- C. frequency of the input trigger
- D. magnitude of the dc supply voltage Discuss
- 8. If a diode is connected across resistor RB (positive end up) in the given figure, what is the new duty cycle of the output waveform?
Options- A. 56%
- B. 44%
- C. 21.6%
- D. 17.4% Discuss
- 9. To obtain a 50% duty cycle in an astable 555 timer circuit:
Options- A. tLO = tHI
- B. RA = RB and short RB with a diode during the capacitor charging cycle
- C. capacitor voltage must rise above 1/3 VCC
- D. tLO = tHI, RA = RB, and short RB with a diode during the capacitor charging cycle Discuss
- 10. An astable multivibrator requires:
Options- A. balanced time constants
- B. a pair of matched transistors
- C. no input signal
- D. dual J-K flip-flops Discuss
Digital Design problems
Search Results
Correct Answer: switch debouncer
Correct Answer: 7.02 mA
Correct Answer: Schmitt trigger
Correct Answer: The J-K flip-flop has a toggle state.
Correct Answer: the high power dissipation of the resistor
Correct Answer: VOH = 8.5 V, VOL = 0.1 V
Correct Answer: value of the RC timing components
Correct Answer: 21.6%
Correct Answer: tLO = tHI
Correct Answer: no input signal
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