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  • Question
  • Which of the following flip-flop timing parameters indicates the time it takes a Q output to respond to a Cp input?


  • Options
  • A. ts, th
  • B. tPHL, tPLH
  • C. tw (L), tw (H)
  • D. fmax

  • Correct Answer
  • tPHL, tPLH 


  • Digital Design problems


    Search Results


    • 1. Define a race condition for a flip-flop.

    • Options
    • A. The inputs to a trigger device are changing slightly before the active trigger edge.
    • B. The inputs to a trigger device are changing slightly after the active trigger edge.
    • C. The inputs to a trigger device are changing at the same time as the active trigger edge.
    • Discuss
    • 2. Why should a LED be pulled LOW from a logic gate rather than pulled HIGH?

    • Options
    • A. LOW-level current is smaller.
    • B. LOW-level current is larger.
    • C. HIGH-level current is larger.
    • D. LOW-level current is smaller and HIGH-level current is larger.
    • Discuss
    • 3. A Schmitt trigger has VT+ = 2.0 V and VT? = 1.2 V. What is the hysteresis voltage of the Schmitt trigger?

    • Options
    • A. 0.4 volt
    • B. 0.6 volt
    • C. 0.8 volt
    • D. 1.2 volts
    • Discuss
    • 4. A Schmitt trigger:

    • Options
    • A. has two trip points
    • B. is a zero crossing detector
    • C. has positive feedback
    • D. has two trip points and positive feedback
    • Discuss
    • 5. Why does the data sheet for the 7476 only give a minimum value for the clock pulse width (both HIGH and LOW)?

    • Options
    • A. nominal value
    • B. best-case condition
    • C. worst-case condition
    • Discuss
    • 6. The main concern when using a pull-down resistor is:

    • Options
    • A. the low power dissipation of the resistor
    • B. it will keep a floating terminal LOW
    • C. the high power dissipation of the resistor
    • D. it will cause false triggering
    • Discuss
    • 7. What is the major advantage of the J-K flip-flop over the S-R flip-flop?

    • Options
    • A. The J-K flip-flop is much faster.
    • B. The J-K flip-flop does not have propagation delay problems.
    • C. The J-K flip-flop has a toggle state.
    • D. The J-K flip-flop has two outputs.
    • Discuss
    • 8. The ________ circuit overcomes the problem of switching caused by jitter on the inputs.

    • Options
    • A. astable multivibrator
    • B. monostable multivibrator
    • C. bistable multivibrator
    • D. Schmitt trigger
    • Discuss
    • 9. The output of a standard TTL NAND gate is used to pull an LED indicator LOW. The LED is in series with a 470-Ω resistor. What is the current in the circuit when the LED is on?

    • Options
    • A. 7.02 mA
    • B. 8.51 mA
    • C. 10.63 mA
    • D. 5.32 mA
    • Discuss
    • 10. One example for the use of a Schmitt trigger is as a(n):

    • Options
    • A. switch debouncer
    • B. racer
    • C. astable oscillator
    • D. transition pulse generator
    • Discuss


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