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Digital Electronics
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Digital Design
Comments
Question
Which of the following flip-flop timing parameters indicates the time it takes a
Q
output to respond to a
C
p
input?
Options
A.
t
s
,
t
h
B.
t
PHL
,
t
PLH
C.
t
w
(L),
t
w
(H)
D.
f
max
Correct Answer
t
PHL
,
t
PLH
Digital Design problems
Search Results
1. Define a race condition for a flip-flop.
Options
A. The inputs to a trigger device are changing slightly before the active trigger edge.
B. The inputs to a trigger device are changing slightly after the active trigger edge.
C. The inputs to a trigger device are changing at the same time as the active trigger edge.
Show Answer
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Discuss
Correct Answer: The inputs to a trigger device are changing at the same time as the active trigger edge.
2. Why should a LED be pulled LOW from a logic gate rather than pulled HIGH?
Options
A. LOW-level current is smaller.
B. LOW-level current is larger.
C. HIGH-level current is larger.
D. LOW-level current is smaller and HIGH-level current is larger.
Show Answer
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Discuss
Correct Answer: LOW-level current is larger.
3. A Schmitt trigger has
V
T
+ = 2.0 V and
V
T
? = 1.2 V. What is the hysteresis voltage of the Schmitt trigger?
Options
A. 0.4 volt
B. 0.6 volt
C. 0.8 volt
D. 1.2 volts
Show Answer
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Discuss
Correct Answer: 0.8 volt
4. A Schmitt trigger:
Options
A. has two trip points
B. is a zero crossing detector
C. has positive feedback
D. has two trip points and positive feedback
Show Answer
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Discuss
Correct Answer: has two trip points and positive feedback
5. Why does the data sheet for the 7476 only give a minimum value for the clock pulse width (both HIGH and LOW)?
Options
A. nominal value
B. best-case condition
C. worst-case condition
Show Answer
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Discuss
Correct Answer: worst-case condition
6. The main concern when using a pull-down resistor is:
Options
A. the low power dissipation of the resistor
B. it will keep a floating terminal LOW
C. the high power dissipation of the resistor
D. it will cause false triggering
Show Answer
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Discuss
Correct Answer: the high power dissipation of the resistor
7. What is the major advantage of the
J-K
flip-flop over the
S-R
flip-flop?
Options
A. The
J-K
flip-flop is much faster.
B. The
J-K
flip-flop does not have propagation delay problems.
C. The
J-K
flip-flop has a toggle state.
D. The
J-K
flip-flop has two outputs.
Show Answer
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Discuss
Correct Answer: The
J-K
flip-flop has a toggle state.
8. The ________ circuit overcomes the problem of switching caused by jitter on the inputs.
Options
A. astable multivibrator
B. monostable multivibrator
C. bistable multivibrator
D. Schmitt trigger
Show Answer
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Discuss
Correct Answer: Schmitt trigger
9. The output of a standard TTL NAND gate is used to pull an LED indicator LOW. The LED is in series with a 470-Ω resistor. What is the current in the circuit when the LED is on?
Options
A. 7.02 mA
B. 8.51 mA
C. 10.63 mA
D. 5.32 mA
Show Answer
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Discuss
Correct Answer: 7.02 mA
10. One example for the use of a Schmitt trigger is as a(n):
Options
A. switch debouncer
B. racer
C. astable oscillator
D. transition pulse generator
Show Answer
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Discuss
Correct Answer: switch debouncer
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