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Home ‣ Digital Electronics ‣ MSI Logic Circuits See What Others Are Saying!
  • Question

  • Why are control inputs included in an HDL magnitude comparator?


  • Options
  • A. For cascading the chips
  • B. For control signal input
  • C. For signal control
  • D. For internal interconnections

  • Correct Answer
  • For cascading the chips 

    • More questions

    • 1. LDA addr and STA addr are Fortran language instructions stored in an external memory IC for a microprocessor.

    • Options
    • A. True
    • B. False
      • Discuss
    • 2. A(n) ________ is a section of embedded logic that is commonly found in FPGAs.

    • Options
    • A. LUT
    • B. core
    • C. DSP
    • D. PI
      • Discuss
    • 3. A combinatorial logic circuit has memory characteristics that "remember" the inputs after they have been removed.

    • Options
    • A. True
    • B. False
      • Discuss
    • 4. Digital systems require that voltage levels change between high and low.

    • Options
    • A. True
    • B. False
      • Discuss
    • 5. How many 3-line-to-8-line decoders are required for a 1-of-32 decoder?

    • Options
    • A. 1
    • B. 2
    • C. 4
    • D. 8
      • Discuss
    • 6. Edge-triggered flip-flops must have:

    • Options
    • A. very fast response times.
    • B. at least two inputs to handle rising and falling edges.
    • C. a pulse transition detector.
    • D. active-LOW inputs and complemented outputs.
      • Discuss
    • 7. Whenever a totem-pole TTL output goes from LOW to HIGH, a high-amplitude current spike is drawn from the Vcc supply. How is this effect corrected to a digital circuit?

    • Options
    • A. By connecting a radio-frequency capacitor from Vcc to ground.
    • B. By using a switching power supply
    • C. By connecting a capacitor from Vout to ground
    • D. By connecting a large resistor from Vcc to Vout
      • Discuss
    • 8. 1/4 as a binary number would be ________.

    • Options
    • A. 0.01
    • B. 0.11
    • C. 0.10
    • D. 0.00
      • Discuss
    • 9. A serial in/serial out shift register transfers data from one line of a parallel bus to another line one bit at a time.

    • Options
    • A. True
    • B. False
      • Discuss
    • 10. The look-ahead carry method suffers from propagation delays.

    • Options
    • A. True
    • B. False
      • Discuss

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