What is the HDL key issue in the design of the MUX and DEMUX? Having the MUX and

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Question
What is the HDL key issue in the design of the MUX and DEMUX?
Options
A. Having the MUX and DEMUX part of the library
B. Using the case statement in the process
C. Describing the functions
D. Assigning signals under certain conditions

Correct Answer

Assigning signals under certain conditions

MSI Logic Circuits problems

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1. How is the number one (1) indicated on the outputs of a 7447 BCD-to-seven-segment code converter?
Options
A. Segment a is active.
B. Segment b is active.
C. Segments a and b are active.
D. Segments b and c are active.

2. There appears to be a problem with a 7-segment display on a DMM sometimes skipping certain numbers. How would you test the display?
Options
A. Remove the display unit and check each segment diode with an ohmmeter. Replace the defective segments.
B. Apply 5 V directly to each segment of the display and check for individual segment operation. Replace any segment that has voltage applied but is not lit.
C. Tie all of the segments together and connect to V_cc; the number 8 should appear on the display. Now check the display supply voltage to determine if the display is receiving the correct voltage.
D. Connect the DMM to a variable supply and very slowly increase the voltage, while observing for missing digits. Then check the segment voltage to determine whether the display or the display driver is bad.

3. A 16-input multiplexer is to be used to perform parallel-to-serial data conversion. Which of the following counters would be required to provide the data select inputs?
Options
A. MOD 8
B. MOD 16
C. MOD 4
D. MOD 2

5. Which statement below best describes the function of a decoder?
Options
A. A decoder will convert a decimal number into the proper binary equivalent.
B. A decoder will convert a binary number into a specific output representing a particular character or digit.
C. Decoders are used to prevent improper operation of digital systems.
D. Decoders are special ICs that are used to make it possible for one brand of computer to talk to another.

6. One can safely state that the output lines for a demultiplexer are under the direct control of the:
Options
A. input data select lines.
B. the internal AND gates.
C. the internal OR gate.
D. Input data line.

7. The BCD/DEC decoder shown in figure (a) is examined with a logic analyzer and the results are shown in the waveforms in figure (b). What, if anything, is wrong with the circuit?
Options
A. The "2" output is shorted to V_cc.
B. The A1 input is internally open.
C. The A1 input node is internally stuck LOW.
D. Nothing is wrong with the circuit.

9. The data transmission system shown in below has a problem; the parity error output is always high. A logic analyzer is used to examine the system and shows that the DATA IN on the left matches the DATA OUT on right. What might be causing the problem?
Options
A. The error gate could be defective.
B. The storage circuit could be defective.
C. The parity checker could be bad.
D. Any of the above.

10. What are the outputs of a 7485 four-bit magnitude comparator when the inputs are A = 1001 and B = 1010?
Options
A. A < B is 1
A = B is 0
A > B is 1
B. A < B is 0
A = B is 1
A > B is 0
C. A < B is 0
A = B is 0
A > B is 1
D. A < B is 1
A = B is 0
A > B is 0

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