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Home Digital Electronics MSI Logic Circuits See What Others Are Saying!
  • Question
  • Determine the correct output for the multiplexer and its associated timing diagram given below.

    Determine the correct output for the multiplexer and its associated timing diagram given below. Ya Y


  • Options
  • A. Ya
  • B. Yb
  • C. Yc
  • D. Yd

  • Correct Answer
  • Yd 


  • More questions

    • 1. The programming technologies that are used in FPGA devices include SRAM, flash, and antifuse, with flash being most common.

    • Options
    • A. True
    • B. False
    • Discuss
    • 2. Which of the following is not generally associated with flip-flops?

    • Options
    • A. Hold time
    • B. Propagation delay time
    • C. Interval time
    • D. Set up time
    • Discuss
    • 3. A 555 operating as a monostable multivibrator has an R1 of 220 kΩ. Determine C1 for a pulse width of 4 ms.

    • Options
    • A. 0.017 µF
    • B. 17 pF
    • C. 170 pF
    • D. 1,700 µF
    • Discuss
    • 4. An effective time delay device can be constructed by using the propagation delay characteristic of parallel shift registers.

    • Options
    • A. True
    • B. False
    • Discuss
    • 5. If a 3-input NOR gate has eight input possibilities, how many of those possibilities will result in a HIGH output?

    • Options
    • A. 1
    • B. 2
    • C. 7
    • D. 8
    • Discuss
    • 6. The complex programmable logic device (CPLD) features a(n) ________ type of memory.

    • Options
    • A. volatile
    • B. nonvolatile
    • C. EPROM
    • D. volitile EPROM
    • Discuss
    • 7. Digital electronics must use a numbering system that has more than ten digits.

    • Options
    • A. True
    • B. False
    • Discuss
    • 8. The final step in a design flow in which the logic design is implemented in the target device is called ________.

    • Options
    • A. design entry
    • B. simulation
    • C. downloading
    • D. compiling
    • Discuss
    • 9. Which of the following is NOT a type of memory?

    • Options
    • A. RAM
    • B. ROM
    • C. FPROM
    • D. EEPROM
    • Discuss
    • 10. Unused TTL inputs should be tied LOW.

    • Options
    • A. True
    • B. False
    • Discuss


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