One output structure of a TTL gate is often referred to as a ________. totem-pol

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Question
One output structure of a TTL gate is often referred to as a ________.
Options
A. totem-pole arrangement
B. diode arrangement
C. JBT arrangement
D. base, emitter, collector arrangement

Correct Answer

totem-pole arrangement

Integrated Circuit Technologies problems

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1. A certain gate draws 1.8 µA when its output is HIGH and 3.3 �A when its output is LOW. V_CC is 5 V and the gate is operated on a 50% duty cycle. What is the average power dissipation (P_D)?
Options
A. 2.55 µW
B. 1.27 µW
C. 12.75 µW
D. 5 µW

2. Which factor does not affect CMOS loading?
Options
A. Charging time associated with the output resistance of the driving gate
B. Discharging time associated with the output resistance of the driving gate
C. Output capacitance of the load gates
D. Input capacitance of the load gates

7. If I_CCH is specified as 1.1 mA when V_CC is 5 V and if the gate is in a static (noncharging) HIGH output state, the power dissipation (P_D) of the gate is ________.
Options
A. 5.5 mW
B. 5.5 W
C. 5 mW
D. 1.1 mW

8. Which is not a precaution for handling CMOS?
Options
A. Devices should be placed with pins down on a grounded surface, such as a metal plate.
B. All tools, test equipment, and metal workbenches should be earth grounded.
C. CMOS devices should not be inserted into sockets or PC boards with the power on.
D. Wear wool clothes at all times.

9. Multiplexing of digital signals is usually required when:
Options
A. moving data internally within a microprocessor.
B. moving data between memory and storage registers in a microprocessor.
C. moving data over long distance transmission lines.
D. moving data internally within a microprocessor or between memory and storage registers.

10. What must be done in the given figure in order to use two 7485 4-bit comparators to compare two 8-bit numbers?
Options
A. The P < Q, P = Q, and P > Q outputs of COMP A must be connected to the same outputs of COMP B.
B. The P < Q, P = Q, and P > Q outputs of COMP A must be connected to the <, =, and > inputs of COMP B.
C. The = input of COMP A must be connected to V_cc, and the < and > inputs must be connected to ground.
D. The P < Q, P = Q, and P > Q outputs of COMP A must be connected to the <, =, and > inputs of COMP B, the = input of COMP A must be connected to V_cc, and the < and > inputs must be connected to ground.

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