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  • Question
  • A certain gate draws 1.8 µA when its output is HIGH and 3.3 µA when its output is LOW. VCC is 5 V and the gate is operated on a 50% duty cycle. What is the average power dissipation (PD)?


  • Options
  • A. 2.55 µW
  • B. 1.27 µW
  • C. 12.75 µW
  • D. 5 µW

  • Correct Answer
  • 12.75 µW 


  • Integrated Circuit Technologies problems


    Search Results


    • 1. Which factor does not affect CMOS loading?

    • Options
    • A. Charging time associated with the output resistance of the driving gate
    • B. Discharging time associated with the output resistance of the driving gate
    • C. Output capacitance of the load gates
    • D. Input capacitance of the load gates
    • Discuss
    • 2. An open-drain gate is the CMOS counterpart of ________.

    • Options
    • A. an open-collector TTL gate
    • B. a tristate TTL gate
    • C. a bipolar junction transistor
    • D. an emitter-coupled logic gate
    • Discuss
    • 3. A TTL NAND gate with IIH(max) of 40 µA per input drives ten TTL inputs. How much current does the drive output source?

    • Options
    • A. 40 µA
    • B. 200 µA
    • C. 400 µA
    • D. 800 µA
    • Discuss
    • 4. Which is not an output state for tristate logic?

    • Options
    • A. HIGH
    • B. LOW
    • C. High-Z
    • D. Low-Z
    • Discuss
    • 5. PMOS and NMOS circuits are used largely in ________.

    • Options
    • A. MSI functions
    • B. LSI functions
    • C. diode functions
    • D. TTL functions
    • Discuss
    • 6. One output structure of a TTL gate is often referred to as a ________.

    • Options
    • A. totem-pole arrangement
    • B. diode arrangement
    • C. JBT arrangement
    • D. base, emitter, collector arrangement
    • Discuss
    • 7. The nominal value of the dc supply voltage for TTL and CMOS is ________.

    • Options
    • A. +3 V
    • B. +5 V
    • C. +9 V
    • D. +12 V
    • Discuss
    • 8. If ICCH is specified as 1.1 mA when VCC is 5 V and if the gate is in a static (noncharging) HIGH output state, the power dissipation (PD) of the gate is ________.

    • Options
    • A. 5.5 mW
    • B. 5.5 W
    • C. 5 mW
    • D. 1.1 mW
    • Discuss
    • 9. Which is not a precaution for handling CMOS?

    • Options
    • A. Devices should be placed with pins down on a grounded surface, such as a metal plate.
    • B. All tools, test equipment, and metal workbenches should be earth grounded.
    • C. CMOS devices should not be inserted into sockets or PC boards with the power on.
    • D. Wear wool clothes at all times.
    • Discuss
    • 10. Multiplexing of digital signals is usually required when:

    • Options
    • A. moving data internally within a microprocessor.
    • B. moving data between memory and storage registers in a microprocessor.
    • C. moving data over long distance transmission lines.
    • D. moving data internally within a microprocessor or between memory and storage registers.
    • Discuss


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