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  • Question
  • In a TTL circuit, if an excessive number of load gate inputs are connected, ________.


  • Options
  • A. VOH(min) drops below VOH
  • B. VOH drops below VOH(min)
  • C. VOH exceeds VOH(min)
  • D. VOH and VOH(min) are unaffected

  • Correct Answer
  • VOH drops below VOH(min) 


  • Integrated Circuit Technologies problems


    Search Results


    • 1. The active switching element used in all TTL circuits is the ________.

    • Options
    • A. bipolar junction transistor (BJT)
    • B. field-effect transistor (FET)
    • C. metal-oxide semiconductor field-effect transistor (MOSFET)
    • D. unijunction transistor (UJ)
    • Discuss
    • 2. TTL is alive and well, particularly in ________.

    • Options
    • A. industrial applications
    • B. educational applications
    • C. military applications
    • D. commercial applications
    • Discuss
    • 3. An open-collector output requires ________.

    • Options
    • A. a pull-down resistor
    • B. a pull-up resistor
    • C. no output resistor
    • D. an output resistor
    • Discuss
    • 4. For a CMOS gate, which is the best speed-power product?

    • Options
    • A. 1.4 pJ
    • B. 1.6 pJ
    • C. 2.4 pJ
    • D. 3.3 pJ
    • Discuss
    • 5. It is best not to leave unused TTL inputs unconnected (open) because of TTL's ________.

    • Options
    • A. noise sensitivity
    • B. low-current requirement
    • C. open-collector outputs
    • D. tristate construction
    • Discuss
    • 6. PMOS and NMOS circuits are used largely in ________.

    • Options
    • A. MSI functions
    • B. LSI functions
    • C. diode functions
    • D. TTL functions
    • Discuss
    • 7. Which is not an output state for tristate logic?

    • Options
    • A. HIGH
    • B. LOW
    • C. High-Z
    • D. Low-Z
    • Discuss
    • 8. A TTL NAND gate with IIH(max) of 40 µA per input drives ten TTL inputs. How much current does the drive output source?

    • Options
    • A. 40 µA
    • B. 200 µA
    • C. 400 µA
    • D. 800 µA
    • Discuss
    • 9. An open-drain gate is the CMOS counterpart of ________.

    • Options
    • A. an open-collector TTL gate
    • B. a tristate TTL gate
    • C. a bipolar junction transistor
    • D. an emitter-coupled logic gate
    • Discuss
    • 10. Which factor does not affect CMOS loading?

    • Options
    • A. Charging time associated with the output resistance of the driving gate
    • B. Discharging time associated with the output resistance of the driving gate
    • C. Output capacitance of the load gates
    • D. Input capacitance of the load gates
    • Discuss


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