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Home ‣ Digital Electronics ‣ Integrated Circuit Technologies See What Others Are Saying!
  • Question

  • Which logic family combines the advantages of CMOS and TTL?


  • Options
  • A. BiCMOS
  • B. TTL/CMOS
  • C. ECL
  • D. TTL/MOS

  • Correct Answer
  • BiCMOS 

    • More questions

    • 1. Which of the figures in figure (a to d) is equivalent to figure (e)?


    • Options
    • A. a
    • B. b
    • C. c
    • D. d
      • Discuss
    • 2. Derive the Boolean expression for the logic circuit shown below:


    • Options
    • A.
    • B.
    • C.
    • D.
      • Discuss
    • 3. In many cases, counters must be strobed in order to eliminate glitches.

    • Options
    • A. True
    • B. False
      • Discuss
    • 4. Which is the correct logic function for this PAL diagram?


    • Options
    • A.
    • B.
    • C.
    • D.
      • Discuss
    • 5. A binary sum is made up of only 1s and 0s.

    • Options
    • A. True
    • B. False
      • Discuss
    • 6. How many possible outputs would a decoder have with a 6-bit binary input?

    • Options
    • A. 16
    • B. 32
    • C. 64
    • D. 128
      • Discuss
    • 7. In VHDL, data can be each of the following types except ________.

    • Options
    • A. BIT
    • B. BIT_VECTOR
    • C. STD_LOGIC
    • D. STD_VECTOR
      • Discuss
    • 8. Refer to the given figures (a) and (b). A logic analyzer is used to check the circuit in figure (a) and displays the waveforms shown in figure (b). The actual analyzer display shows all four data outputs, Q0-Q3. The analyzer's cursor is placed at position X and all four of the data output lines show a LOW level output. What is wrong, if anything, with the circuit?


    • Options
    • A. Nothing is wrong, according to the display. The outputs are in the open state and should show zero output voltage.
    • B. The circuit is in the READ mode and the outputs, Q0-Q3, should reflect the contents of the memory at that address. The chip is defective; replace the chip.
    • C. The circuit is in the mode and should be writing the contents of the selected address to Q0?Q3.
    • D. The Q0?Q3 lines can be either LOW or HIGH, since the chip is in the tristate mode in which case their level is unpredictable.
      • Discuss
    • 9. Refer the given figure. The outputs (Q0?Q3) of the memory are always LOW. The address lines (A0?A7) are checked with a logic probe and all are indicating pulse activity, except for A3, which shows a constant HIGH, and A7, which shows a constant LOW; the select lines, are checked and shows pulse activity, while indicates a constant HIGH. What is wrong, and how can the memory be tested to determine whether it is defective or if the external circuitry is defective?


    • Options
    • A. One of the inputs to the active-LOW select AND gate may be stuck high for some reason; take both select lines LOW and check for pulse activity on the outputs, Q0?Q3. If the outputs now respond, the problem is most likely in the program or circuitry driving the select lines.
    • B. The problem appears to be in the two address lines that never change levels; the problem is probably in the program driving the memory address bus.
    • C. The output buffers are probably defective since they are all tied together; the common input line is most likely stuck LOW. Change the output buffer IC.
    • D. Since no data appears to be getting through to the output buffers, the problem may be in the X decoder; change the X decoder IC.
      • Discuss
    • 10. The quantity represented by #1 in the given figure is ________.


    • Options
    • A. VH(max)
    • B. VL(min)
    • C. VH(min)
    • D. VL(max)
      • Discuss

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