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  • Question
  • The greater the propagation delay, the ________.


  • Options
  • A. lower the maximum frequency
  • B. higher the maximum frequency
  • C. maximum frequency is unaffected
  • D. minimum frequency is unaffected

  • Correct Answer
  • lower the maximum frequency 


  • Integrated Circuit Technologies problems


    Search Results


    • 1. A TTL NAND gate with IIL(max) of ?1.6 mA per input drives eight TTL inputs. How much current does the drive output sink?

    • Options
    • A. ?12.8 mA
    • B. ?8 mA
    • C. ?1.6 mA
    • D. ?25.6 mA
    • Discuss
    • 2. What is the speed of the up/down digital-ramp ADC (tracking ADC)?

    • Options
    • A. 20 µs
    • B. 10 µs
    • C. 1 µs
    • D. Relatively slow
    • Discuss
    • 3. The primary disadvantage of the simultaneous A/D converter is:

    • Options
    • A. that it requires the input voltage to be applied to the inputs simultaneously
    • B. the long conversion time required
    • C. the large number of output lines required to simultaneously decode the input voltage
    • D. the large number of comparators required to represent a reasonable sized binary number
    • Discuss
    • 4. What is the acquisition time of the AD1154 sample-and-hold IC?

    • Options
    • A. 1.5 µs
    • B. 2.5 µs
    • C. 3.5 µs
    • D. 4.5 µs
    • Discuss
    • 5. When comparing the conversions from digital-to-analog and analog-to-digital, the A/D conversion is generally:

    • Options
    • A. less complicated but more time consuming than the D/A conversion.
    • B. more complicated and more time consuming than the D/A conversion.
    • C. less complicated and less time consuming than the D/A conversion.
    • D. more complicated but less time consuming than the D/A conversion.
    • Discuss
    • 6. Most TTL logic used today is some form of ________.

    • Options
    • A. Schottky TTL
    • B. tristate TTL
    • C. low-power TTL
    • D. open-collector TTL
    • Discuss
    • 7. Which logic family combines the advantages of CMOS and TTL?

    • Options
    • A. BiCMOS
    • B. TTL/CMOS
    • C. ECL
    • D. TTL/MOS
    • Discuss
    • 8. Which is not part of emitter-coupled logic (ECL)?

    • Options
    • A. Differential amplifier
    • B. Bias circuit
    • C. Emitter-follower circuit
    • D. Totem-pole circuit
    • Discuss
    • 9. Which transistor element is used in CMOS logic?

    • Options
    • A. FET
    • B. MOSFET
    • C. Bipolar
    • D. Unijunction
    • Discuss
    • 10. Which is not a MOSFET terminal?

    • Options
    • A. Gate
    • B. Drain
    • C. Source
    • D. Base
    • Discuss


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