logo

CuriousTab

CuriousTab

Discussion


Home Digital Electronics Interfacing to the Analog World Comments

  • Question
  • A 4-bit stairstep-ramp A/D converter has a clock frequency of 100 kHz and maximum input voltage of 10 V.


  • Options
  • A. The maximum number of samples per second will be 6250.
  • B. The maximum sample rate will be 100,000 samples/second.
  • C. The minimum sample rate will be 6250 samples/second.
  • D. The minimum sample rate will be 100,000 samples/second.

  • Correct Answer
  • The minimum sample rate will be 6250 samples/second. 


  • Interfacing to the Analog World problems


    Search Results


    • 1. What is the output voltage of the given circuit if the inputs are as follows:
      20 = 1, 21 = 1, 22 = 0, 23 = 0?


    • Options
    • A. ?3.115 volts
    • B. ?2.8025 volts
    • C. ?1.875 volts
    • D. ?1.24 volts
    • Discuss
    • 2. Two principal advantages of the dual-slope ADC are its:

    • Options
    • A. high speed and low cost.
    • B. high sensitivity to noise and low cost.
    • C. low sensitivity to noise and high speed.
    • D. low sensitivity to noise and low cost.
    • Discuss
    • 3. What is the maximum conversion time for a counter-ramp ADC with 8-bit resolution and a clock frequency of 20 kHz?

    • Options
    • A. 12.8 ms
    • B. 6.4 ms
    • C. 0.05 ms
    • D. 0.4 ms
    • Discuss
    • 4. Which of the statements below best describes the basic operation of a dual-slope A/D converter?

    • Options
    • A. The input voltage is used to set the frequency of a voltage-controlled oscillator (VCO). The VCO quits changing frequency when the input voltage stabilizes. The frequency of the VCO, which is proportional to the analog input voltage, is measured and is displayed on the digital display as a voltage reading.
    • B. A ramp generator is used to enable a counter through a comparator. When the ramp voltage equals the input voltage, the counter is latched and then reset. The counter reading is proportional to the input voltage since the ramp is changing at a constant V/second rate.
    • C. A ramp voltage and analog input voltage are applied to a comparator. As the input voltage causes the integrating capacitor to charge, it will at some point equal the ramp voltage. The ramp voltage is measured and displayed on the digital panel meter.
    • D. Two ramps are generated: one by the input voltage and the other by a reference voltage. The input voltage ramp charges the integrating capacitor, while the reference voltage discharges the capacitor and enables the counter until the capacitor is discharged, at which time the counter value is loaded into the output latches.
    • Discuss
    • 5. Why is a binary-weighted DAC usually limited to 4-bit binary conversion?

    • Options
    • A. too many pins on the IC
    • B. too many op amps needed
    • C. too many different values of capacitors
    • D. too many different values of resistors
    • Discuss
    • 6. One major difference between a counter-ramp A/D converter and a successive-approximation converter is:

    • Options
    • A. the counter-ramp A/D converter is much faster than the successive-approximation converter
    • B. with the successive-approximation converter the final binary result is always slightly less than the equivalent analog input, whereas with the counter-ramp A/D converter it is slightly more
    • C. with the successive-approximation converter the final binary result is always slightly more than the equivalent analog input, whereas with the counter-ramp A/D converter it is slightly less
    • D. none of the above
    • Discuss
    • 7. What is the main disadvantage of the stairstep-ramp A/D converter?

    • Options
    • A. The counter must count up from zero at the beginning of each conversion sequence, and the conversion time will vary depending on the input voltage.
    • B. It requires a counter.
    • C. It requires a precision clock in order for the conversion to be reliable.
    • D. All of the above
    • Discuss
    • 8. One disadvantage of the tracking A/D converter is:

    • Options
    • A. that it requires two counters?one for up and one for down.
    • B. that the binary output will oscillate between two binary states when the analog input is constant.
    • C. the need for an accurate clock reference for the counter.
    • D. the need for a latch and its associated control circuit.
    • Discuss
    • 9. What is the current in the feedback resistor for the circuit given below?


    • Options
    • A. 0.625 mA
    • B. 1.25 mA
    • C. 1.875 mA
    • D. 1.625 mA
    • Discuss
    • 10. What is the main disadvantage of the counter-ramp A/D converter?

    • Options
    • A. It requires a counter.
    • B. The counter must count up from zero at the beginning of each conversion sequence, and the conversion time will vary depending on the input voltage.
    • C. It requires a precision clock in order for the conversion to be reliable.
    • D. The counter must count up from zero at the beginning of each conversion sequence, and the conversion time will vary depending on the input voltage. It requires a precision clock in order for the conversion to be reliable.
    • Discuss


    Comments

    There are no comments.

Enter a new Comment