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- Question
What is the maximum conversion time for a counter-ramp ADC with 8-bit resolution and a clock frequency of 20 kHz?
Options- A. 12.8 ms
- B. 6.4 ms
- C. 0.05 ms
- D. 0.4 ms
- Correct Answer
- 12.8 ms
- 1. Which of the statements below best describes the basic operation of a dual-slope A/D converter?
Options- A. The input voltage is used to set the frequency of a voltage-controlled oscillator (VCO). The VCO quits changing frequency when the input voltage stabilizes. The frequency of the VCO, which is proportional to the analog input voltage, is measured and is displayed on the digital display as a voltage reading.
- B. A ramp generator is used to enable a counter through a comparator. When the ramp voltage equals the input voltage, the counter is latched and then reset. The counter reading is proportional to the input voltage since the ramp is changing at a constant V/second rate.
- C. A ramp voltage and analog input voltage are applied to a comparator. As the input voltage causes the integrating capacitor to charge, it will at some point equal the ramp voltage. The ramp voltage is measured and displayed on the digital panel meter.
- D. Two ramps are generated: one by the input voltage and the other by a reference voltage. The input voltage ramp charges the integrating capacitor, while the reference voltage discharges the capacitor and enables the counter until the capacitor is discharged, at which time the counter value is loaded into the output latches. Discuss
- 2. Why is a binary-weighted DAC usually limited to 4-bit binary conversion?
Options- A. too many pins on the IC
- B. too many op amps needed
- C. too many different values of capacitors
- D. too many different values of resistors Discuss
- 3. What is the purpose of a sample-and-hold circuit?
Options- A. To keep temporary memory
- B. To hold a voltage constant so an ADC has time to produce an output
- C. To hold a voltage constant so a DAC has time to produce an output
- D. To hold data after a multiplexer has selected an output Discuss
- 4. The practical use of binary-weighted digital-to-analog converters is limited to:
Options- A. R/2R ladder D/A converters
- B. 4-bit D/A converters
- C. 8-bit D/A converters
- D. op-amp comparators Discuss
- 5. What circuitry is on an ADC0808 IC?
Options- A. A multiplexer
- B. An ADC
- C. A 3-bit select input code
- D. All of the above Discuss
- 6. Two principal advantages of the dual-slope ADC are its:
Options- A. high speed and low cost.
- B. high sensitivity to noise and low cost.
- C. low sensitivity to noise and high speed.
- D. low sensitivity to noise and low cost. Discuss
- 7. What is the output voltage of the given circuit if the inputs are as follows:
20 = 1, 21 = 1, 22 = 0, 23 = 0?
Options- A. ?3.115 volts
- B. ?2.8025 volts
- C. ?1.875 volts
- D. ?1.24 volts Discuss
- 8. A 4-bit stairstep-ramp A/D converter has a clock frequency of 100 kHz and maximum input voltage of 10 V.
Options- A. The maximum number of samples per second will be 6250.
- B. The maximum sample rate will be 100,000 samples/second.
- C. The minimum sample rate will be 6250 samples/second.
- D. The minimum sample rate will be 100,000 samples/second. Discuss
- 9. One major difference between a counter-ramp A/D converter and a successive-approximation converter is:
Options- A. the counter-ramp A/D converter is much faster than the successive-approximation converter
- B. with the successive-approximation converter the final binary result is always slightly less than the equivalent analog input, whereas with the counter-ramp A/D converter it is slightly more
- C. with the successive-approximation converter the final binary result is always slightly more than the equivalent analog input, whereas with the counter-ramp A/D converter it is slightly less
- D. none of the above Discuss
- 10. What is the main disadvantage of the stairstep-ramp A/D converter?
Options- A. The counter must count up from zero at the beginning of each conversion sequence, and the conversion time will vary depending on the input voltage.
- B. It requires a counter.
- C. It requires a precision clock in order for the conversion to be reliable.
- D. All of the above Discuss
Interfacing to the Analog World problems
Search Results
Correct Answer: Two ramps are generated: one by the input voltage and the other by a reference voltage. The input voltage ramp charges the integrating capacitor, while the reference voltage discharges the capacitor and enables the counter until the capacitor is discharged, at which time the counter value is loaded into the output latches.
Correct Answer: too many different values of resistors
Correct Answer: To hold a voltage constant so an ADC has time to produce an output
Correct Answer: 4-bit D/A converters
Correct Answer: All of the above
Correct Answer: low sensitivity to noise and low cost.
Correct Answer: ?1.875 volts
Correct Answer: The minimum sample rate will be 6250 samples/second.
Correct Answer: with the successive-approximation converter the final binary result is always slightly less than the equivalent analog input, whereas with the counter-ramp A/D converter it is slightly more
Correct Answer: The counter must count up from zero at the beginning of each conversion sequence, and the conversion time will vary depending on the input voltage.
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